Product Folder Sample & Buy Tools & Software Technical Documents Support & Community Reference Design TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 TRF7970A Multiprotocol Fully Integrated 13.56-MHz RFID and Near Field Communication (NFC) Transceiver IC 1 Device Overview 1.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 1.4 www.ti.com Functional Block Diagram Figure 1-1 shows the block diagram.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Table of Contents 1 2 3 4 5 Device Overview ......................................... 1 1.1 Features .............................................. 1 1.2 Applications ........................................... 1 1.3 Description ............................................ 1 1.4 Functional Block Diagram ............................ 2 Revision History ......................................... 4 Device Characteristics ...............
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 2 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision J (February 2014) to Revision K • • • • • • • • • • • • • • • • • • • • • • • • 4 Page Changed Figure 1-1 to show 127-byte FIFO ...................................................................................... 2 Moved Section 3 ..........................................................................
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 3 Device Characteristics Table 3-1 shows the supported modes of operation for the TRF7970A device. Table 3-1. Supported Modes of Operation P2P Initiator or Reader/Writer (1) Technology Bit rate (kbps) NFC-A/B (ISO14443A/B) Card Emulation P2P Target Technology Bit rate (kbps) Technology Bit rate (kbps) 106, 212, 424, 848 (1) NFC-A/B 106 NFC-A 106 NFC-F (JIS: X6319-4) 212, 424 N/A N/A NFC-F 212, 424 NFC-V (ISO15693) 6.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 4 Terminal Configuration and Functions 4.1 Pin Assignments Figure 4-1 shows the pin assignments for the 32-pin RHB package.
TRF7970A www.ti.com 4.2 SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Terminal Functions Table 4-1 describes the signals. Table 4-1. Terminal Functions TERMINAL NAME NO. TYPE (1) DESCRIPTION VDD_A 1 OUT Internal regulated supply (2.7 V to 3.4 V) for analog circuitry VIN 2 SUP External supply input to chip (2.7 V to 5.5 V) VDD_RF 3 OUT Internal regulated supply (2.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Table 4-1. Terminal Functions (continued) TERMINAL NAME OSC_OUT NO. 30 TYPE (1) DESCRIPTION OUT Crystal or oscillator output INP Crystal or oscillator input OUT Crystal oscillator output OSC_IN 31 VDD_X 32 OUT Internally regulated supply (2.7 V to 3.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 5 Specifications 5.1 Absolute Maximum Ratings (1) (2) over operating free-air temperature range (unless otherwise noted) VIN Input voltage range IIN Maximum current VIN TJ Maximum operating virtual junction temperature (1) (2) (3) 5.2 -0.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 5.3 www.ti.com Electrical Characteristics TYP operating conditions are TA = 25°C, VIN = 5 V, full-power mode (unless otherwise noted) MIN and MAX operating conditions are over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 0.
TRF7970A www.ti.com 5.4 Handling Ratings TSTG Storage temperature range V(ESD) (1) (2) Electrostatic discharge Human-Body Model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) MIN MAX UNIT -55 150 °C -2 2 kV Charged-Device Model (CDM), per JEDEC specification JESD22-C101, all pins (2) -500 500 V Machine Model (MM) -200 200 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6 Detailed Description 6.1 6.1.1 Overview RFID and NFC Operation – Reader and Writer The TRF7970A is a high performance 13.56-MHz HF RFID and NFC Transceiver IC composed of an integrated analog front end (AFE) and a built-in data framing engine for ISO15693, ISO14443A/B, and FeliCa. This includes data rates up to 848 kbps for ISO14443 with all framing and synchronization tasks on board (in default mode).
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 The transmitter supports OOK and ASK modulation with selectable modulation depth. The TRF7970A also includes a data transmission engine that comprises low-level encoding for ISO15693, ISO14443A/B and FeliCa. Included with the transmit data coding is the automatic generation of Start Of Frame (SOF), End Of Frame (EOF), Cyclic Redundancy Check (CRC), or parity bits.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com in IRQ register. The MCU must set EN = H (confirm the power-up) in the time between the two IRQs, because the internal power-up ends after the second IRQ. The type and coding of the first initiator (or reader in the case of a tag emulator) command defines the communication protocol type that the target must use.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 The transmit system in passive target mode differs from active target and operates similar to the standard tag. There is no automatic RF collision avoidance sequence, and encoders are used to code the data for ISO14443A\B tag (at 106 kbps, to start) or FeliCa (at 212 kbps, to start) format. The collision avoidance must be handled by the firmware on the connected MCU.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.3.1 www.ti.com Supply Arrangements Regulator Supply Input: VIN The positive supply at VIN (pin 2) has an input voltage range of 2.7 V to 5.5 V. VIN provides the supply input sources for three internal regulators with the output voltages VDD_RF, VDD_A, and VDD_X. External bypass capacitors for supply noise filtering must be used (per reference schematics). NOTE VIN must be the highest voltage supplied to the TRF7970A.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Power Amplifier Supply: VDD_PA The power amplifier of the TRF7970A is supplied through VDD_PA(pin 4). The positive supply pin for the RF power amplifier is externally connected to the regulator output VDD_RF (pin 3). I/O Level Shifter Supply: VDD_I/O The TRF7970A has a separate supply input VDD_I/O (pin 16) for the built-in I/O level shifter. The supported input voltage ranges from 1.8 V to VIN, not exceeding 5.5 V.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.3.2 www.ti.com Supply Regulator Settings The input supply voltage mode of the reader needs to be selected. This is done in the Chip Status Control register (0x00). Bit 0 in register 0x00 selects between 5-V or 3-V input supply voltage. The default configuration is 5 V, which reflects an operating supply voltage range of 4.3 V to 5.5 V. If the supply voltage is below 4.3 V, the 3-V configuration should be used.
TRF7970A www.ti.com 6.3.3 SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Power Modes The chip has several power states, which are controlled by two input pins (EN and EN2) and several bits in the chip status control register (0x00) (see Table 6-3 and Table 6-4). Table 6-3. 3.3-V Operation Power Modes (1) EN2 EN Chip Status Control Register (0x00) Power Down 0 0 XX XX OFF OFF OFF OFF OFF <0.001 - Sleep Mode 1 0 XX XX OFF OFF OFF ON ON 0.120 - Standby Mode at +3.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com When user MCU is controlling EN and EN2, a delay of 1 ms between EN and EN2 must be used. If the MCU controls only EN, EN2 is recommended to be connected to either VIN or GND, depending on the application MCU requirements for VDD_X and SYS_CLK. VIN 2 ms SS EN2 EN 5 ms 6 ms Figure 6-3. Nominal Start-Up Sequence Using SPI With SS (MCU Controls EN2) VIN 5 ms EN2 6 ms EN Figure 6-4.
TRF7970A www.ti.com 6.4 6.4.1 SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Receiver – Analog Section Main and Auxiliary Receivers The TRF7970A has two receiver inputs: RX_IN1 (pin 8) and RX_IN2 (pin 9). Each of the input is connected to an external capacitive voltage divider to ensure that the modulated signal from the tag is available on at least one of the two inputs. This architecture eliminates any possible communication holes that may occur from the tag to the reader.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Table 6-5. RX Special Setting Register (0x0A) Function: Sets the gains and filters directly Default: 0x40 at POR = H or EN = L, and at each write to the ISO Control register 0x01. When bits B7, B6, B5 and B4 are all zero, the filters are set for ISO14443B (240 kHz to 1.4 MHz).
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 NOTE If register setting changes are needed for fine tuning the system, they must be done after setting the ISO Control register (0x01). The framing section also supports the bit-collision detection as specified in ISO14443A. When a bit collision is detected, an interrupt request is sent and a flag is set in the IRQ and Status register (0x0C).
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com The main register controlling the digital part of the receiver is the ISO Control register (address 0x01). By writing to this register, the user selects the protocol to be used. At the same time (with each new write in this register) the default preset in all related registers is done, so no further adjustments in other registers are needed for proper operation. Table 6-6 shows the coding of the ISO Control register (0x01). Table 6-6.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Table 6-7.
TRF7970A RSSI Levels and Oscillator Status Register value (0x0F) SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 7 6 5 4 3 2 1 0 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 Input RF Carrier Level in VPP [V] 3 3.25 3.5 3.75 4 4.25 Figure 6-5. Digital Internal RSSI (Main and Auxiliary) Value vs RF Input Level in VPP (V) This RSSI measurement is done during the communication to the Tag; this means the TX must be on.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 The relation between the 3-bit code and the external RF field strength (A/m) sensed by the antenna must be determined by calculation or by experiments for each antenna design. The antenna Q-factor and connection to the RF input influence the result. Direct command 0x19 is used to trigger an Internal RSSI measurement. For clarity, to check the internal or external RSSI value independent of any other operation, the user must: 1.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Table 6-9. Minimum Crystal Requirements Parameter Specification Frequency 13.56 MHz or 27.12 MHz Mode of Operation Fundamental Type of Resonance Parallel Frequency Tolerance ±20 ppm Aging < 5 ppm/year Operation Temperature Range -40°C to 85°C Equivalent Series Resistance 50 Ω As an alternative, an external clock oscillator source can be connected to Pin 31 to provide the system clock; pin 30 can be left open. 6.
TRF7970A www.ti.com • SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Send the transmit command and the number of bytes to be transmitted first, and then start to send the data to the FIFO. The transmission starts when first data byte is written into the FIFO.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.10 TRF7970A IC Communication Interface 6.10.1 General Introduction The communication interface to the reader can be configured in two ways: with a eight line parallel interface (D0:D7) plus DATA_CLK, or with a three or four wire Serial Peripheral Interface (SPI). The SPI interface uses traditional Master Out/Slave In (MOSI), Master In/Slave Out (MISO), IRQ, and DATA_CLK lines.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Communication is initialized by a start condition, which is expected to be followed by an Address/Command word (Adr/Cmd). The Adr/Cmd word is 8 bits long, and Table 6-11 shows its format. Table 6-11.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.10.1.1 Continuous Address Mode Table 6-12. Continuous Address Mode Start Adr x Data(x) Data(x+1) Data(x+2) Data(x+3) Data(x+4) ... Data(x+n) StopCont Figure 6-8. Continuous Address Register Write Example Starting with Register 0x00 Using SPI With SS Figure 6-9.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.10.1.2 Noncontinuous Address Mode (Single Address Mode) Table 6-13. Noncontinuous Address Mode (Single Address Mode) Start Adr x Data(x) Adr y Data(y) ... Adr z Data(z) StopSgl Figure 6-10. Single Address Register Write Example of Register 0x00 Using SPI With SS Figure 6-11.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.10.1.3 Direct Command Mode Table 6-14. Direct Command Mode Start Cmd x (Optional data or command) Stop Figure 6-12. Direct Command Example of Sending 0x0F (Reset) Using SPI With SS The other Direct Command Codes from MCU to TRF7970A IC are described in Section 6.13. 6.10.1.4 FIFO Operation The FIFO is a 127-byte register at address 0x1F with byte storage locations 0 to 126.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 During transmission, the MCU loads the TRF7970A IC's FIFO (or during reception the MCU removes data from the FIFO), and the FIFO counter counts the number of bytes being loaded into the FIFO. Meanwhile, the byte counter keeps track of the number of bytes being transmitted. An interrupt request is generated if the number of bytes in the FIFO is less than 32 or greater than 96, so that MCU can send new data or remove the data as necessary.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Figure 6-15. Parallel Interface Communication with Continuous Stop Condition (StopCont) Figure 6-16. Example of Parallel Interface Communication With Continuous Stop Condition 6.10.3 Reception of Air Interface Data At the start of a receive operation (when SOF is successfully detected), B6 is set in the IRQ Status register.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.10.4 Data Transmission to MCU Before beginning data transmission, the FIFO should always be cleared with a reset command (0x0F). Data transmission is initiated with a selected command (see Section 6.13). The MCU then commands the reader to do a continuous write command (0x3D) starting from register 0x1D.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com The procedure for a dummy read is as follows: 1. Start the dummy read: (a) When using slave select (SS): set SS bit low. (b) When not using SS: start condition is when Data Clock is high (see Table 6-10). 2. Send address word to IRQ status register (0x0C) with read and continuous address mode bits set to 1 (see Table 6-10). 3. Read 1 byte (8 bits) from IRQ status register (0x0C). 4.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.10.5.1 Serial Interface Mode With Slave Select (SS) The serial interface is in reset while the Slave Select signal is high. Serial data in (MOSI) changes on the rising edge, and is validated in the reader on the falling edge, as shown in Figure 6-19. Communication is terminated when the Slave Select signal goes high. All words must be 8 bits long with the MSB transmitted first.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Figure 6-21. Continuous Read of Registers 0x00 Through 0x05 Using SPI With SS Performing Single Slot Inventory Command as an example is shown in Figure 6-22. Reader registers (in this example) are configured for 5 VDC in and default operation. Figure 6-22.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Figure 6-23. IRQ After Inventory Command The IRQ status register read (0x6C) yields 0x80, which indicates that TX is indeed complete. This is followed by a dummy clock. Then, if a tag is in the field and no error is detected by the reader, a second interrupt is expected and occurs (in this example) approximately 4 ms after first IRQ is read and cleared.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Figure 6-25. Continuous Read of FIFO After Inventory Command At this point, it is good form to reset the FIFO and then read out the RSSI value of the tag. In this case the transponder is very close to the antenna, so value of 0x7F is recovered. Figure 6-26.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.10.6 Direct Mode Direct mode allows the user to configure the reader in one of two ways. Direct Mode 0 (bit 6 = 0, as defined in ISO Control register) allows the user to use only the front-end functions of the reader, bypassing the protocol implementation in the reader. For transmit functions, the user has direct access to the transmit modulator through the MOD pin (pin 14).
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Step 1: Configure Pins I/O_0 to I/O_2 for SPI with SS Step 2: Set Pin 12 of the TRF7970A (ASK/OOK pin) to 0 for ASK or 1 for OOK Step 3: Program the TRF7970A registers The following registers need to be explicitly set before going into the Direct Mode. 1. ISO Control register (0x01) to the appropriate standard – 0x02 for ISO 15693 High Data Rate – 0x08 for ISO14443A (106 kbps) – 0x1A for FeliCa 212 kbps – 0x1B for FeliCa 424 kbps 2.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Step 4: Entering Direct Mode 0 The following registers need to be programmed to enter Direct Mode 0 1. Set bit B6 of the Modulator and SYS_CLK Control register (0x09) to 1. 2. Set bit B6 of the ISO Control (Register 01) to 0 for Direct Mode 0 (default its 0) 3. Set bit B6 of the Chip Status Control register (0x00) to 1 to enter Direct Mode 4.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Step 5: Transmit Data Using Direct Mode The application now has direct control over the RF modulation through the MOD input (see Figure 6-29). TRF7970A Microcontroller MOD (Pin 14) Drive the MOD pin according to the data coding specified by the standard I/O_6 (Pin 23) Decode the subcarrier information according to the standard Figure 6-29.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 ? ? ? 128/fc = 9.435 µs = tb (106-kbps data rate) 64/fc = 4.719 µs = tx time 32/fc = 2.359 µs = t1 time tb = 9.44 µs tx = 4.72 µs Sequence Y = Carrier for 9.44 µs t1 = 2.48 µs Sequence Z = Pause for 2 to 3 µs, Carrier for Remainder of 9.44 µs Figure 6-31.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Figure 6-32. RX Sequence on I/O_6 in DM0 (Analog Capture) Step 7: Terminating Direct Mode 0 After the EOF is received, data transmission is over, and Direct Mode 0 can be terminated by sending a Stop Condition (in the case of SPI, make the Slave Select go high). The TRF7970A is returned to default state. 6.11 Special Direct Mode for Improved MIFARE™ Compatibility See the application report TRF7970A Firmware Design Hints (SLOA159). 6.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Table 6-15. NFC Target Detection Level Register Bit Signal Name B7 Id_s1 B6 Id_s0 B5 Sdd_en Comments NFCID1 size used in 106 kbps passive target SDD Automatic SDD using internal state machine and ID stored in NFCID Number register (1) 1 = Enables internal SDD protocol B4 (1) Function N/A B3 Hi_rf B2 Rfdet_h2 B1 Rfdet_h1 B0 Rfdet_h0 Extended range for RF measurements RF field level required for system wake-up.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Default: reset to 00 at POR and EN = L. B0 to B4 are automatically reset after MCU read operation. B6 and B7 continuously display the RF level comparator outputs. Based on the first command from INITIATOR following actions are taken: • If the first command is SENS_REQ or ALL_REQ, the TARGET must enter the SDD protocol for 106 kbps passive communication.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.12.2 Initiator The chip is fully controlled by the MCU as in RFID reader operation. The MCU activates the chip and writes the mode selection in the ISO Control register. The MCU uses RF collision avoidance commands, so it is relieved of any real-time task. The normal transmit and receive procedure (through the FIFO) are used to communicate with the TARGET device as described in Section 6.10. 6.13 Direct Commands from MCU to Reader 6.13.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com The MSB determines if the word is to be used as a command or address. The last two columns of Table 6-20 show the function of each bit, depending on whether address or command is written. Command mode is used to enter a command resulting in reader action (initialize transmission, enable reader, and turn reader on or off). 6.13.1.1 Idle (0x00) This command issues dummy clock cycles. In parallel mode, one cycle is issued.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.13.1.3 Initial RF Collision Avoidance (0x04) This command executes the initial collision avoidance and sends out IRQ after 5 ms from establishing RF field (so the MCU can start sending commands/data). If the external RF field is present (higher than the level set in NFC Low Field Detection Level register (0x16)) then the RF field can not be switched on and hence a different IRQ is returned. 6.13.1.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com the external system (MCU), so the external system can stop this by putting the receive decoders in reset mode. The reset mode can be terminated in two ways. The external system can send the enable receiver command. The reset mode is also automatically terminated at the end of a TX operation. The receiver can stay in reset after end of TX if the RX wait time register (0x08) is set.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.13.1.16 Receiver Gain Adjust (0x1A) This command should be executed when the MCU determines that no TAG response is coming and when the RF and receivers are switched ON. When this command is received, the reader observes the digitized receiver output. If more than two edges are observed in 100 ms, the window comparator voltage is increased.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Table 6-24. Register Definitions (continued) Address Register Read/Write 0x19 NFC Target Protocol R/W Status Registers 0x0C IRQ status R 0x0D Collision position and interrupt mask register R/W 0x0E Collision position R 0x0F RSSI levels and oscillator status R 0x12 RAM R/W 0x13 RAM R/W 0x1A Test Register. Preset 0x00 R/W 0x1B Test Register.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.14.3 Detailed Register Description 6.14.3.1 Main Configuration Registers 6.14.3.1.1 Chip Status Control Register (0x00) Table 6-25. Chip Status Control Register (0x00) Function: Control of Power mode, RF on/off, AGC, AM/PM, Direct Mode Default: 0x01, preset at EN = L or POR = H Bit B7 B6 B5 B4 B3 B2 B1 B0 Name stby direct rf_on Function Description 1 = Standby Mode Standby mode keeps all supply regulators, 13.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Table 6-26. ISO Control Register (0x01) (continued) B2 iso_2 RFID / Card Emulation NFC: 0 = NFC Normal Modes 1 = Card Emulation Mode B1 iso_1 RFID / NFC bit rate NFC: 0 = bit rate selection or card emulation selection, see Table 6-28 B0 iso_0 RFID / NFC bit rate NFC: 0 = bit rate selection or card emulation selection, see Table 6-28 Table 6-27.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.14.3.2 Control Registers – Sub Level Configuration Registers 6.14.3.2.1 ISO14443 TX Options Register (0x02) Table 6-29.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.14.3.2.3 TX Timer High Byte Control Register (0x04) Table 6-31.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.14.3.2.5 TX Pulse Length Control Register (0x06) The length of the modulation pulse is defined by the protocol selected in the ISO Control register 0x01. With a high Q antenna, the modulation pulse is typically prolonged, and the tag detects a longer pulse than intended. For such cases, the modulation pulse length can be corrected by using the TX Pulse Length Control register (0x06).
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.14.3.2.7 RX Wait Time Register (0x08) The RX-wait-time timer is controlled by the value in the RX wait time register 0x08. This timer defines the time after the end of the transmit operation in which the receive decoders are not active (held in reset state). This prevents incorrect detections resulting from transients following the transmit operation. The value of the RX wait time register defines this time in increments of 9.44 µs.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.14.3.2.8 Modulator and SYS_CLK Control Register (0x09) The frequency of SYS_CLK (pin 27) is programmable by the bits B4 and B5 of this register. The frequency of the TRF7970A system clock oscillator is divided by 1, 2 or 4 resulting in available SYS_CLK frequencies of 13.56 MHz or 6.78 MHz or 3.39 MHz. The ASK modulation depth is controlled by bits B0, B1 and B2. The range of ASK modulation is 7% to 30% or 100% (OOK).
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.14.3.2.9 RX Special Setting Register (Address 0x0A) Table 6-37. RX Special Setting Register (Address 0x0A) Function: Sets the gains and filters directly Default: 0x40 at POR = H or EN = L, and at each write to the ISO Control register 0x01. When bits B7, B6, B5 and B4 are all zero, the filters are set for ISO14443B (240 kHz to 1.4 MHz).
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.14.3.2.10 Regulator and I/O Control Register (0x0B) Table 6-38. Regulator and I/O Control Register (0x0B) Function: Control the three voltage regulators Default: 0x87 at POR = H or EN = L Bit Name Function Description 0 = Manual settings; see B0 to B2 in Table 6-39 and Auto system sets VDD_RF = VIN – 250 mV and VDD_A = VIN – 250 mV and Table 6-40 VDD_X= VIN – 250 mV, but not higher than 3.4 V.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Table 6-41. Supply-Regulator Setting – Automatic 5-V System Register Option Bits Setting in Control Register B7 B6 B5 B4 B3 B2 B1 x (1) 0 00 0B (1) 1 Action B0 1 5-V system 0 Automatic regulator setting 400-mV difference x = don't care Table 6-42.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Table 6-44. IRQ Status Register (0x0C) for NFC and Card Emulation Operation Function: Information available about TRF7970A IRQ and TX/RX status Default: 0x00 at POR = H or EN = L, and at each write to the ISO Control Register 0x01. It is also automatically reset at the end of a read phase. The reset also removes the IRQ flag. Bit Name B7 Irq_tx IRQ set due to end of TX Signals that TX is in progress.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.14.3.3.3 RSSI Levels and Oscillator Status Register (0x0F) Table 6-47. RSSI Levels and Oscillator Status Register (0x0F) Function: Displays the signal strength on both reception channels and RF amplitude during RF-off state. The RSSI values are valid from reception start till start of next transmission.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.14.3.3.5 Special Functions Register (0x11) Table 6-49. Special Functions Register (0x11) Function: Indicate IRQ status for RX operations.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.14.3.3.8 NFCID1 Number Register (0x17) This register is used to hold the ID of the TRF7970A for use during card emulation and NFC peer-to-peer target operations. The procedure for writing the ID into register 0x17 is the following: 1. Write bits 5, 6, and 7 in register 0x18 to enable SDD anticollision (bit 5), and set bit 6 and 7 to select the ID length of 4, 7, or 10 bytes. 2. Write the ID into register 0x17.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.14.3.3.10 NFC Target Protocol Register (0x19) This register is used (when read) to display the bit rate and protocol type when an NFC/RFID Initiator/Reader is presented. An example use of this scenario would be when the TRF7970A is placed into card emulation (Type A or Type B) and another TRF7970A or NFC device (polling for other NFC devices) is presented to the TRF7970A in card emulation mode.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.14.3.4 Test Registers 6.14.3.4.1 Test Register (0x1A) Table 6-54. Test Register (0x1A) (for Test or Direct Use) Default: 0x00 at POR = H and EN = L.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 6.14.3.5 FIFO Control Registers 6.14.3.5.1 FIFO Status Register (0x1C) Table 6-56.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.14.3.5.2 TX Length Byte1 Register (0x1D), TX Length Byte2 Register (0x1E) Table 6-57. TX Length Byte1 Register (0x1D) Function: High 2 nibbles of complete, intended bytes to be transferred through FIFO Register default is set to 0x00 at POR and EN = 0.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 7 Application Schematic and Layout Considerations 7.1 TRF7970A Reader System Using Parallel Microcontroller Interface 7.1.1 General Application Considerations Figure 7-1 shows the most flexible TRF7970A application schematic. Both ISO15693, ISO14443 and FeliCa systems can be addressed. Due to the low clock frequency on the DATA_CLK line, the parallel interface is the most robust way to connect the TRF7970A with the MCU.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 7.2 www.ti.com TRF7970A Reader System Using SPI With SS Mode 7.2.1 General Application Considerations Figure 7-2 shows the TRF7970A application schematic optimized for both ISO15693 and ISO14443 systems using the Serial Port Interface (SPI). Short SPI lines, proper isolation of radio frequency lines, and a proper ground area are essential to avoid interference. The recommended clock frequency on the DATA_CLK line is 2 MHz.
TRF7970A www.ti.com 7.3 SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Layout Considerations Keep all decoupling capacitors as close to the IC as possible, with the high-frequency decoupling capacitors (10 nF) closer than the low-frequency decoupling capacitors (2.2 µF). Place ground vias as close as possible to the ground side of the capacitors and reader IC pins to minimize possible ground loops. It is not recommend to use any inductor sizes below 0603, as the output power can be compromised.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Figure 7-3. Impedance Matching Circuit This yields the Smith Chart Simulation shown in Figure 7-4. Figure 7-4.
TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Resulting power out can be measured with a power meter or spectrum analyzer with power meter function or other equipment capable of making a "hot" measurement. Observe maximum power input levels on test equipment and use attenuators whenever available to avoid damage to equipment. Expected output power levels under various operating conditions are shown in Table 6-25. 7.
TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 8 Device and Documentation Support 8.1 Documentation Support The following documents describe the TRF7970A device. Copies of these documents are available on the Internet at www.ti.com. SLOZ011 8.2 TRF7970A Silicon Errata. Describes the known exceptions to the functional specifications for the TRF7970A. Community Resources The following links connect to TI community resources.
PACKAGE OPTION ADDENDUM www.ti.
PACKAGE OPTION ADDENDUM www.ti.com 4-Apr-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE MATERIALS INFORMATION www.ti.com 15-Jan-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TRF7970ARHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 TRF7970ARHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.
PACKAGE MATERIALS INFORMATION www.ti.com 15-Jan-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TRF7970ARHBR VQFN RHB 32 3000 367.0 367.0 35.0 TRF7970ARHBT VQFN RHB 32 250 210.0 185.0 35.
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