User's Manual
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Quick reference data
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Limiting values
- 8. Recommended operating conditions
- 9. Thermal characteristics
- 10. Characteristics
- 10.1 Power management characteristics
- 10.2 Antenna presence self test thresholds
- 10.3 Typical 27.12 MHz Crystal requirements
- 10.4 Pin characteristics for 27.12 MHz XTAL Oscillator (OSCIN, OSCOUT)
- 10.5 RSTPD_N input pin characteristics
- 10.6 Input pin characteristics for I0, I1 and TESTEN
- 10.7 RSTOUT_N output pin characteristics
- 10.8 Input/output characteristics for pin P70_IRQ
- 10.9 Input/output pin characteristics for P30 / UART_RX, P31 / UART_TX, P32_INT0, P33_INT1
- 10.10 Input/output pin characteristics for P35
- 10.11 Input/output pin characteristics for DP and DM
- 10.12 Input pin characteristics for SCL
- 10.13 Input/output pin characteristics for SDA
- 10.14 Output pin characteristics for DELATT
- 10.15 Input pin characteristics for SIGIN
- 10.16 Output pin characteristics for SIGOUT
- 10.17 Input/output pin characteristics for P34
- 10.18 Output pin characteristics for LOADMOD
- 10.19 Input pin characteristics for RX
- 10.20 Output pin characteristics for AUX1/AUX2
- 10.21 Output pin characteristics for TX1/TX2
- 10.22 System reset timing
- 10.23 Timing for the I2C-bus interface
- 10.24 Temperature sensor
- 11. Application information
- 12. Abbreviations
- 13. Revision history
- 14. Legal information
- 15. Contact information
- 16. Tables
- 17. Figures
- 18. Contents

PR533_SDS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product short data sheet
COMPANY PUBLIC
Rev. 3.6 — 27 October 2014
206436 7 of 36
NXP Semiconductors
PR533
USB NFC integrated reader solution
[1] Pin types: I= Input, O = Output, I/O = Input/Output, P = Power and G = Ground.
7. Limiting values
[1] 1500 , 100 pF; EIA/JESD22-A114-A
[2] 0.75 mH, 200 pF; EIA/JESD22-A115-A
[3] Field induced model; EIA/JESC22-C101-C
RSTPD_N 38 I PVDD reset and power-down: When LOW, internal current sources are switched off,
the oscillator is inhibited, and the input pads are disconnected from the out-
side world.
With a negative edge on this pin the internal reset phase starts.
DVDD 39 P digital power supply
VBUS 40 P USB power supply.
Table 3. PR533 pin description
…continued
Symbol Pin Type Pad ref
voltage
Description
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DDA
analog supply voltage 0.5 +4 V
V
DDD
digital supply voltage 0.5 +4 V
V
DD(TVDD)
TVDD supply voltage 0.5 +4 V
V
DD(PVDD)
PVDD supply voltage 0.5 +4 V
V
DD(SVDD)
SVDD supply voltage 0.5 +4 V
V
BUS
bus supply voltage 0.5 +5.5 V
P
tot
total power dissipation - 500 mW
I
DD(SVDD)
SVDD supply current maximum current in V
DDS
switch
-30 mA
V
i
input voltage TX1, TX2, RX pins 0.5 +4 V
V
ESD
electrostatic discharge voltage HBM
[1]
2.0 kV
MM
[2]
-200V
CDM
[3]
- 1kV
T
stg
storage temperature 55 +150 C
T
j
junction temperature 40 +125 C
V
i(dyn)(RX)
dynamic input voltage on pin RX input signal at 13.56 MHz 0.7 V
DD(AVDD)
+1.0 V
V
i(dyn)(TX1)
dynamic input voltage on pin TX1 input signal at 13.56 MHz 1.2 V
DD(TVDD)
+1.3 V
V
i(dyn)(TX2)
dynamic input voltage on pin TX2 input signal at 13.56 MHz 1.2 V
DD(TVDD)
+1.3 V
I
TX1
current on pin TX1 output signal at 13.56 MHz 300 +300 mA
I
TX2
current on pin TX2 output signal at 13.56 MHz 300 +300 mA