User's Manual
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Quick reference data
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Limiting values
- 8. Recommended operating conditions
- 9. Thermal characteristics
- 10. Characteristics
- 10.1 Power management characteristics
- 10.2 Antenna presence self test thresholds
- 10.3 Typical 27.12 MHz Crystal requirements
- 10.4 Pin characteristics for 27.12 MHz XTAL Oscillator (OSCIN, OSCOUT)
- 10.5 RSTPD_N input pin characteristics
- 10.6 Input pin characteristics for I0, I1 and TESTEN
- 10.7 RSTOUT_N output pin characteristics
- 10.8 Input/output characteristics for pin P70_IRQ
- 10.9 Input/output pin characteristics for P30 / UART_RX, P31 / UART_TX, P32_INT0, P33_INT1
- 10.10 Input/output pin characteristics for P35
- 10.11 Input/output pin characteristics for DP and DM
- 10.12 Input pin characteristics for SCL
- 10.13 Input/output pin characteristics for SDA
- 10.14 Output pin characteristics for DELATT
- 10.15 Input pin characteristics for SIGIN
- 10.16 Output pin characteristics for SIGOUT
- 10.17 Input/output pin characteristics for P34
- 10.18 Output pin characteristics for LOADMOD
- 10.19 Input pin characteristics for RX
- 10.20 Output pin characteristics for AUX1/AUX2
- 10.21 Output pin characteristics for TX1/TX2
- 10.22 System reset timing
- 10.23 Timing for the I2C-bus interface
- 10.24 Temperature sensor
- 11. Application information
- 12. Abbreviations
- 13. Revision history
- 14. Legal information
- 15. Contact information
- 16. Tables
- 17. Figures
- 18. Contents
PR533_SDS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product short data sheet
COMPANY PUBLIC
Rev. 3.6 — 27 October 2014
206436 19 of 36
NXP Semiconductors
PR533
USB NFC integrated reader solution
[1] The value does not guarantee the power-down consumptions. To reach the specified power-down consumptions, the limit is
V
DD(PVDD)
0.4 V.
[2] The value does not guarantee the power-down consumptions. To reach the specified power-down consumptions, the limit is 0.4 V.
[1] The I
OH
and I
OL
give the output driving capability and allow to calculate directly the rise and fall time as function of the load capacitance
Table 21. Input Pin characteristics for DP for HSU interface
Symbol Parameter Conditions Min Typ Max Unit
V
IH
HIGH-level input voltage
[1]
0.7 V
DD(PVDD)
-V
DD(PVDD)
V
V
IL
LOW-level input voltage
[2]
0-0.3 V
DD(PVDD)
V
I
IH
HIGH-level input current V
i
= V
DD(PVDD)
--1mA
I
IL
LOW-level input current V
i
= 0 V - - 1 mA
I
LI
input leakage current RSTPD_N = 0 V 11mA
C
i
input capacitance - 2.5 3.5 pF
Table 22. Output Pin characteristics for DM for HSU interface
Symbol Parameter Conditions Min Typ Max Unit
V
OH
HIGH-level output
voltage
V
DD(PVDD)
=3V; I
OH
= 4 mA V
DD(PVDD)
0.4 - V
DD(PVDD)
V
V
DD(PVDD)
=1.8V; I
OH
= 2 mA V
DD(PVDD)
0.4 - V
DD(PVDD)
V
V
OL
LOW-level output volt-
age
V
DD(PVDD)
=3V; I
OL
= 4 mA 0 - 0.4 V
V
DD(PVDD)
=1.8V; I
OL
= 2 mA 0 - 0.4 V
I
OH
HIGH-level output
current
V
DD(PVDD)
=3V;
V
OH
=0.8 V
DD(PVDD)
[1]
4--mA
V
DD(PVDD)
=1.8V;
V
OH
=0.7 V
DD(PVDD)
2--mA
I
OL
LOW-level output cur-
rent
V
DD(PVDD)
=3.3V;
V
OL
=0.2 V
DD(PVDD)
[1]
4--mA
V
DD(PVDD)
=1.8V;
V
OL
=0.3 V
DD(PVDD)
2--mA
I
LI
input leakage current RSTPD_N = 0 V 1-1mA
C
L
load capacitance - - 30 pF
t
r
rise time V
DDP
=3V;
V
OH
=0.8 V
DD(PVDD)
;
C
L
=30pF
- - 13.5 ns
V
DD(PVDD)
=1.8V;
V
OH
=0.7 V
DD(PVDD)
;
C
L
=30pF
- - 10.8 ns
t
f
fall time V
DD(PVDD)
=3V;
V
OL
=0.2 V
DD(PVDD)
;
C
L
=30pF
- - 13.5 ns
V
DDP
=1.8V;
V
OL
=0.3 V
DD(PVDD)
;
C
L
=30pF
- - 10.8 ns