User's Manual

PR533_SDS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product short data sheet
COMPANY PUBLIC
Rev. 3.6 — 27 October 2014
206436 17 of 36
NXP Semiconductors
PR533
USB NFC integrated reader solution
10.11 Input/output pin characteristics for DP and DM
[1] The value does not guarantee the power-down consumptions. To reach the specified power-down consumptions, the limit is 0.4 V.
[2] The I
OH
and I
OL
give the output driving capability and allow to calculate directly the rise and fall time as function of the load capacitance.
Table 18. Input/output pin characteristics for DP and DM for USB interface
Symbol Parameter Conditions Min Typ Max Unit
V
IH
HIGH-level input voltage V
DD(PVDD)
=3.3V 2 - 3.6 V
V
IL
LOW-level input voltage
[1]
0- 0.8V
V
OH
HIGH-level output voltage V
DD(PVDD)
=3.3V;
R
PD
=1.5  to V
SS
2.8 - V
DD(PVDD)
V
V
OL
LOW-level output voltage V
DD(PVDD)
=3.3V;
R
PD
=1.5  to V
DD(PVDD)
0- 0.3V
I
OH
HIGH-level output current V
DD(PVDD)
=3.3V;
V
OH
=0.8 V
DD(PVDD)
[2]
4- - mA
V
DD(PVDD)
=1.8V;
V
OH
=0.7 V
DD(PVDD)
2- - mA
I
OL
LOW-level output current V
DD(PVDD)
=3.3V;
V
OL
=0.2 V
DD(PVDD)
[2]
4- - mA
V
DD(PVDD)
=1.8V;
V
OL
=0.3 V
DD(PVDD)
2- - mA
I
IH
HIGH-level input current V
I
=V
DD(PVDD)
--1A
I
IL
LOW-level input current V
I
=0V --1A
I
LI
input leakage current RSTPD_N = 0 V 1- +1A
C
i
input capacitance - 2.5 3.5 pF
Z
INP
input impedance exclusive of
pull-up/pull-down (for low-/full
speed)
300 - - k
Z
DRV
driver output impedance for driver
which is not high-speed capable
28 - 44 
t
FDRATE
full-speed data rate for devices
which are not high-speed capable
11.97 - 12.03 Mb/s
t
DJ1
source jitter total (including fre-
quency tolerance) to next transition
3.5 - +3.5 ns
t
DJ2
source jitter total (including fre-
quency tolerance) for paired transi-
tions
4- +4ns
t
FDEOP
source jitter for differential transition
to SE0 transition
2- +5ns
t
JR1
receiver jitter to next transition 18.5 - +18.5 ns
t
JR2
receiver jitter for paired transitions 9- +9ns
t
FEOPT
source SE0 interval of EOP 160 - 175 ns
t
FEOPR
receiver SE0 interval of EOP 82 - - ns
t
FST
width of SE0 interval during differ-
ential transition
--14ns