User's Manual

PR533_SDS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product short data sheet
COMPANY PUBLIC
Rev. 3.6 — 27 October 2014
206436 11 of 36
NXP Semiconductors
PR533
USB NFC integrated reader solution
10.3 Typical 27.12 MHz Crystal requirements
10.4 Pin characteristics for 27.12 MHz XTAL Oscillator (OSCIN, OSCOUT)
[1] 
n(th)
and f
n(th)
define the mask for maximum acceptable phase noise of the clock signal at the OSCIN, OSCOUT inputs. See Figure 3
“27.12 MHz input clock phase noise spectrum mask”.
Table 10. Crystal requirements
Symbol Parameter Conditions Min Typ Max Unit
f
xtal
crystal frequency 27.107 27.12 27.133 MHz
ESR equivalent series resistance - - 100 
C
L
load capacitance - 10 - pF
P
xtal
crystal power dissipation 100 - - W
Table 11. Pin characteristics for 27.12 MHz XTAL Oscillator (OSCIN, OSCOUT)
Symbol Parameter Conditions Min Typ Max Unit
I
LI
input leakage current RSTPD_N = 0 V 1-+1mA
V
IH
HIGH-level input voltage 0.7  V
DDA
-V
DDA
V
V
IL
LOW-level input voltage 0 - 0.3  V
DDA
V
V
OH
HIGH-level output voltage - 1.1 - V
V
OL
LOW-level output voltage - 0.2 - V
f
clk
clock frequency 0.05 % 27.12 +0.05 % MHz
 duty cycle 40 50 60 %

n(th)
phase noise threshold
[1]
--140 dBc/Hz
f
n(th)
phase noise threshold fre-
quency

n(th)
= 140dBc/Hz;
20dB/decade slope
[1]
- - 50 kHz
OSCIN
V
i
input voltage DC - 0.65 - V
C
i
input capacitance V
DDA
= 2.8 V; V
i
(DC) = 0.65 V;
V
i
(AC) = 1 V p-p
-2-pF
OSCOUT
C
i
input capacitance - 2 - pF
Fig 3. 27.12 MHz input clock phase noise spectrum mask
φ
n(th)
phase noise
(dBc/Hz)
-20 dB/decade
acceptable phase
noise area
001aao393
f
φn(th)
frequency (Hz)