User's Manual

MOSI
MISO
SS*
SCLK
B0
B0 B0
B7
B7 B7
B6
B6 B6
B5
B5 B5
B4
B4 B4
B3
B3 B3
B2
B2 B2
B1
B1 B1
No Data Transitions (All High/Low) No Data Transitions (All High/Low)
Don’t Care
ContinuousReadOperation
Write Address Byte
Read Data Byte 1
Read Data Byte n
MOSI
MISO
SS*
SCLK
B0
B0
B7
B7
B6
B6
B5
B5
B4
B4
B3
B3
B2
B2
B1
B1
No Data Transitions (All High/Low)
No Data Transitions (All High/Low)
Don’t Care
Ignore
SpecialCase – IRQStatusRegisterRead
Dummy Read
ReadDatain
IRQStatusRegister
Write Address
Byte(0x6C)
TRF7960
TRF7961
www.ti.com SLOU186F–AUGUST 2006–REVISED AUGUST 2010
Figure 5-11. SPI Interface Communication (Continuous Read Mode)
Note:
Special steps are needed to read the TRF796x IRQ status register (register address 0x0C) in SPI mode.
The status of the bits in this register is cleared after a dummy read. The following steps must be followed
when reading the “IRQ status register”.
1. Write in command 0x6C: read 'IRQ status' register in continuous mode (eight clocks).
2. Read out the data in register 0x0C (eight clocks).
3. Generate another eight clocks (as if reading the data in register 0x0D) but ignore the MISO data line.
This is shown in Figure 5-12.
Figure 5-12. SPI Interface Communication (IRQ Status Register Read)
Copyright © 2006–2010, Texas Instruments Incorporated System Description 43
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