User's Manual

TRF7960
TRF7961
SLOU186F–AUGUST 2006–REVISED AUGUST 2010 www.ti.com
5.3 Register Descriptions
Table 5-8. Register Address Space
Adr (hex) Register Read/Write
Main Control Registers
00 Chip status control R/W
01 ISO control R/W
Protocol Sub-Setting Registers
02 ISO14443B TX options R/W
03 ISO 14443A high bit rate options R/W
04 TX timer setting, H-byte R/W
05 TX timer setting, L-byte R/W
06 TX pulse-length control R/W
07 RX no response wait R/W
08 RX wait time R/W
09 Modulator and SYS_CLK control R/W
0A RX special setting R/W
0B Regulator and I/O control R/W
16 Unused NA
17 Unused NA
18 Unused NA
19 Unused NA
Status Registers
0C IRQ status R
0D Collision position and interrupt mask register R/W
0E Collision position R
0F RSSI levels and oscillator status R
FIFO Registers
1C FIFO status R
1D TX length byte1 R/W
1E TX length byte2 R/W
1F FIFO I/O register R/W
24 System Description Copyright © 2006–2010, Texas Instruments Incorporated
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