User's Manual

apmcomm confidential
apm6658/6659 WiFi 802.11 b/g/n & BT2.1+EDR Dual Radio Module
Product Information Data Sheet
Page 11 of 30
apm Communication, Inc. – TEL: [phone] – FAX: [phone]
Website: http://www.apmcomm.com – E-mail:
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apmcomm Proprietary and Confidential – Product information is subject to change without notice.– May 30 2011
1-4 WiFi Pins
1-4-1 SDIO Pins
apm6658/6659 supports a SDIO device interface that conforms to the industry standard SDIO Full-Speed card
specification and allows a host controller using the SDIO bus protocol to access apm6658/6659.
The SDIO bus has weak internal pull up resistors on chip.
SDIO Bus Name Pin #
Pin Name Description
DAT3 26 WL_SD_DAT[3]
SDIO 4-bit mode: CD- Data line [bit 3] or card detect
SDIO 1-bit mode: CD- Card detect
DAT2 24 WL_SD_DAT[2]
SDIO 4-bit mode: RW- Data line [bit 2] or read wait(optional)
SDIO 1-bit mode: RW- Read Wait (optional)
DAT1 27 WL_SD_DAT[1]
SDIO 4-bit mode: IRQ#- Data line [bit 1] or interrupt (optional)
SDIO 1-bit mode: IRQ#- Interrupt
DAT0 29 WL_SD_DAT[0]
LSB data bit for SDIO interface.
SDIO 4-bit mode: Data line [bit 0]
SDIO 1-bit mode: Data line
CMD 28 WL_SD_CMD
SDIO 4-bit mode: Command/Response
SDIO 1-bit mode: Command/Response
CLK 25 WL_SD_CLK
SDIO 4-bit mode: Clock
SDIO 1-bit mode: Clock
VDDIO 23 WL_VSDIO Serial I/O VDD
1-4-2 CSPI Pins
While SDIO port is not available on host platform, apm6658/6659 supports a SD-SPI device interface that
connects to Synchronous Serial Port (SSP) pins on Marvell PXA platform or the similar interfaces on other host
platforms.
The SD-SPI bus has weak internal pull up resistors on chip.
SD-SPI Name Pin #
Pin Name Description
CS 26 WL_SD_DAT[3]
Card Select