User's Manual
Table Of Contents
- 1 Device Overview
- Table of Contents
- 2 Revision History
- 3 Device Characteristics
- 4 Terminal Configuration and Functions
- 5 Specifications
- 6 Detailed Description
- 6.1 Overview
- 6.2 System Block Diagram
- 6.3 Power Supplies
- 6.4 Receiver – Analog Section
- 6.5 Receiver – Digital Section
- 6.6 Oscillator Section
- 6.7 Transmitter – Analog Section
- 6.8 Transmitter – Digital Section
- 6.9 Transmitter – External Power Amplifier and Subcarrier Detector
- 6.10 TRF7970A IC Communication Interface
- 6.11 Special Direct Mode for Improved MIFARE Compatibility
- 6.12 NFC Modes
- 6.13 Direct Commands from MCU to Reader
- 6.13.1 Command Codes
- 6.13.1.1 Idle (0x00)
- 6.13.1.2 Software Initialization (0x03)
- 6.13.1.3 Initial RF Collision Avoidance (0x04)
- 6.13.1.4 Response RF Collision Avoidance (0x05)
- 6.13.1.5 Response RF Collision Avoidance (0x06, n = 0)
- 6.13.1.6 Reset (0x0F)
- 6.13.1.7 Transmission With CRC (0x11)
- 6.13.1.8 Transmission Without CRC (0x10)
- 6.13.1.9 Delayed Transmission With CRC (0x13)
- 6.13.1.10 Delayed Transmission Without CRC (0x12)
- 6.13.1.11 Transmit Next Time Slot (0x14)
- 6.13.1.12 Block Receiver (0x16)
- 6.13.1.13 Enable Receiver (0x17)
- 6.13.1.14 Test Internal RF (RSSI at RX Input With TX ON) (0x18)
- 6.13.1.15 Test External RF (RSSI at RX Input with TX OFF) (0x19)
- 6.13.1.16 Receiver Gain Adjust (0x1A)
- 6.13.1 Command Codes
- 6.14 Register Description
- 7 Application Schematic and Layout Considerations
- 8 Device and Documentation Support
- 9 Mechanical Packaging and Orderable Information
TRF7970A
SLOS743K –AUGUST 2011–REVISED APRIL 2014
www.ti.com
6.14.3.5.2 TX Length Byte1 Register (0x1D), TX Length Byte2 Register (0x1E)
Table 6-57. TX Length Byte1 Register (0x1D)
Function: High 2 nibbles of complete, intended bytes to be transferred through FIFO
Register default is set to 0x00 at POR and EN = 0. It is also automatically reset at TX EOF
Bit Name Function Description
Number of complete byte
B7 Txl11
bn[11]
Number of complete byte
B6 Txl10
bn[10]
High nibble of complete, intended bytes to be transmitted
Number of complete byte
B5 Txl9
bn[9]
Number of complete byte
B4 Txl8
bn[8]
Number of complete byte
B3 Txl7
bn[7]
Number of complete byte
B2 Txl6
bn[6]
Middle nibble of complete, intended bytes to be transmitted
Number of complete byte
B1 Txl5
bn[5]
Number of complete byte
B0 Txl4
bn[4]
Table 6-58. TX Length Byte2 Register (0x1E)
Function: Low nibbles of complete bytes to be transferred through FIFO; Information about a broken byte and number of bits to be
transferred from it
Default: 0x00 at POR and EN = 0. It is also automatically reset at TX EOF
Bit Name Function Description
Number of complete byte
B7 Txl3
bn[3]
Number of complete byte
B6 Txl2
bn[2]
Low nibble of complete, intended bytes to be transmitted
Number of complete byte
B5 Txl1
bn[1]
Number of complete byte
B4 Txl0
bn[0]
Broken byte number of bits
B3 Bb2
bb[2]
Broken byte number of bits Number of bits in the last broken byte to be transmitted.
B2 Bb1
bb[1] It is taken into account only when broken byte flag is set.
Broken byte number of bits
B1 Bb0
bb[0]
B0 Bbf Broken byte flag B0 = 1, indicates that last byte is not complete 8 bits wide.
74 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated
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