User's Manual
Table Of Contents
- 1 Device Overview
- Table of Contents
- 2 Revision History
- 3 Device Characteristics
- 4 Terminal Configuration and Functions
- 5 Specifications
- 6 Detailed Description
- 6.1 Overview
- 6.2 System Block Diagram
- 6.3 Power Supplies
- 6.4 Receiver – Analog Section
- 6.5 Receiver – Digital Section
- 6.6 Oscillator Section
- 6.7 Transmitter – Analog Section
- 6.8 Transmitter – Digital Section
- 6.9 Transmitter – External Power Amplifier and Subcarrier Detector
- 6.10 TRF7970A IC Communication Interface
- 6.11 Special Direct Mode for Improved MIFARE Compatibility
- 6.12 NFC Modes
- 6.13 Direct Commands from MCU to Reader
- 6.13.1 Command Codes
- 6.13.1.1 Idle (0x00)
- 6.13.1.2 Software Initialization (0x03)
- 6.13.1.3 Initial RF Collision Avoidance (0x04)
- 6.13.1.4 Response RF Collision Avoidance (0x05)
- 6.13.1.5 Response RF Collision Avoidance (0x06, n = 0)
- 6.13.1.6 Reset (0x0F)
- 6.13.1.7 Transmission With CRC (0x11)
- 6.13.1.8 Transmission Without CRC (0x10)
- 6.13.1.9 Delayed Transmission With CRC (0x13)
- 6.13.1.10 Delayed Transmission Without CRC (0x12)
- 6.13.1.11 Transmit Next Time Slot (0x14)
- 6.13.1.12 Block Receiver (0x16)
- 6.13.1.13 Enable Receiver (0x17)
- 6.13.1.14 Test Internal RF (RSSI at RX Input With TX ON) (0x18)
- 6.13.1.15 Test External RF (RSSI at RX Input with TX OFF) (0x19)
- 6.13.1.16 Receiver Gain Adjust (0x1A)
- 6.13.1 Command Codes
- 6.14 Register Description
- 7 Application Schematic and Layout Considerations
- 8 Device and Documentation Support
- 9 Mechanical Packaging and Orderable Information
TRF7970A
SLOS743K –AUGUST 2011–REVISED APRIL 2014
www.ti.com
6.14.3.2.3 TX Timer High Byte Control Register (0x04)
Table 6-31. TX Timer High Byte Control Register (0x04)
Function: For Timings
Default: 0xC2 at POR = H or EN = L, and at each write to ISO Control register
Bit Name Function Description
B7 tm_st1 Timer Start Condition tm_st1 = 0, tm_st0 = 0 → beginning of TX SOF
tm_st1 = 0, tm_st0 = 1 → end of TX SOF
tm_st1 = 1, tm_st0 = 0 → beginning of RX SOF
B6 tm_st0 Timer Start Condition
tm_st1 = 1, tm_st0 = 1 → end of RX SOF
B5 tm_lengthD Timer Length MSB
B4 tm_lengthC Timer Length
B3 tm_lengthB Timer Length
B2 tm_lengthA Timer Length
B1 tm_length9 Timer Length
B0 tm_length8 Timer Length LSB
6.14.3.2.4 TX Timer Low Byte Control Register (0x05)
Table 6-32. TX Timer Low Byte Control Register (0x05)
Function: For Timings
Default: 0x00 at POR = H or EN = L, and at each write to ISO Control register
Bit Name Function Description
B7 tm_length7 Timer Length MSB
B6 tm_length6 Timer Length
Defines the time when delayed transmission is started.
B5 tm_length5 Timer Length
RX wait range is 590 ns to 9.76 ms (1 to 16383)
B4 tm_length4 Timer Length
Step size is 590 ns
B3 tm_length3 Timer Length
All bits low = timer disabled (0x00)
B2 tm_length2 Timer Length
B1 tm_length1 Timer Length Preset 0x00 for all other protocols
B0 tm_length0 Timer Length LSB
60 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated
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