User's Manual

Intel® Centrino® Wireless-N 105 (Canyon Peak)

Intel® Centrino® Wireless-N 135 (Canyon Peak w/Bluetooth)

Intel® Centrino® Wireless-N 2200 (Marble Peak)

Intel® Centrino® Wireless-N 2230 (Jackson Peak 1)

Intel® Centrino® Advanced-N 6235 (Jackson Peak 2)

Hardware Specification, Rev. 2.2

Intel Confidential

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4 Host interface Description

4.1 USB Interface

Table 10 describes the Bluetooth characteristics.

Table 13: USB Interface Signal Description

USB Interface

Description

USB Version

Supports 2.0 version.

Operational Mode

Full Speed modes.

Power

Powered from PCI Express interface (3.3V power rail).

Signaling Level

See USB 2.0 specifications.

Suspend Support

According to the USB 2.0 spec, the host may enter the interface

into suspend mode, allowing the device to save power by

switching to low power mode.

4.2 PCI Interface

Squelch Detect Mechanism

The Squelch (SQ) Detect mechanism in JP/MP/CyP 

 threshold of 175 mV, as defined by PCIe

spec.

It is important to follow proper platform design and layout guidelines as defined in the PCIe

CEM specification to ensure PCH wake signaling (Electrical Idle Detect Threshold - -idle-

det-diff-p-

 65mV to 450mV for JP2

 65mV to 280mV for JP1/MP/CyP/CyP_BT

Customer should design/plan appropriately for all adapters that may be used in a given

platform.