User's Manual
Table Of Contents
- Document History
- Introduction
- Product Concept
- Application Interface
- Operating Modes
- Power Supply
- Power Up / Power Down Scenarios
- Automatic GPRS Multislot Class Change
- Charging Control
- Summary of State Transitions (Except SLEEP Mode)
- RTC Backup
- SIM Interface
- Serial Interface ASC0
- Serial Interface ASC1
- USB Interface
- I2C Interface
- Audio Interfaces
- Control Signals
- Antenna Interface
- Electrical, Reliability and Radio Characteristics
- Mechanics
- Sample Application
- Reference Approval
- Appendix
TC63 Hardware Interface Description
Strictly confidential / Draft
s
TC63_HD_V00.432 Page 20 of 97 11.05.2005
2.3 Circuit Concept
Figure 2 shows a block diagram of the TC63 module and illustrates the major functional
components:
Baseband block:
• Digital baseband processor with DSP
• Analog processor with power supply unit (PSU)
• Flash / SRAM (stacked)
• Application interface (board-to-board connector)
RF section:
• RF transceiver
• RF power amplifier
• RF front end
• Antenna connector
Digital Baseband
Processor with DSP
Analog Controller
with PSU
BATT+
GND
IGT
EM ERG_ RS T
ASC (0)
5
SIM Interface
CCIN
CCRST
CCIO
CCCLK
CCVCC
D(0:15)
A(0 :24)
RD; WR; CS; WAIT
RF Control Bus
Interface
RF - Baseband
NTC
BATT_TEMP
VDDLP
SYN C
R
F
P
a
r
t
Transceiver
RF Power
Amplifier
SRAM
Flash
6
8
TC63
Application Interface (80 pins)
I / Q
4
Au di o a na log
10
SD Card
USB
3
I2C
2
VEX T
ISEN SE
VSE NSE
VC HA RGE
CHARGEGATE
3
RESET
R
e
s
e
t
BATTYPE
TE M P2
REFCHG
ASC (1)4
26MHz
Front End
DAI
7
8
PWR _IN D
Measuring
Network
32.768kHz
26MHz
RTC
Figure 2: TC63 block diagram