User's Manual

Cinterion
®
PLS8-X/PLS8-V Hardware Interface Overview
3.3 USB Interface
26
PLS8-X_PLS8-V_HIO_v03.009 2015-08-04
Confidential / Preliminary
Page 21 of 40
3.3 USB Interface
PLS8-X/PLS8-V supports a USB 2.0 High Speed (480Mbps) device interface. The USB inter-
face is primarily intended for use as command and data interface and for downloading firm-
ware.
The USB host is responsible for supplying the VUSB_IN line. This line is for voltage detection
only. The USB part (driver and transceiver) is supplied by means of BATT+. This is because
PLS8-X/PLS8-V is designed as a self-powered device compliant with the “Universal Serial Bus
Specification Revision 2.0”
1
.
Figure 3: USB circuit
To properly connect the module's USB interface to the external application, a USB 2.0 compat-
ible connector and cable or hardware design is required. Furthermore, the USB modem driver
distributed with PLS8-X/PLS8-V needs to be installed.
1.
The specification is ready for download on http://www.usb.org/developers/docs/
DP
DN
VREG (3V075)
BATT+
USB_DP
3)
lin. reg.
GND
Module
Detection only
VUSB_IN
2)
USB part
1)
1)
All serial (including R
S
) and pull-up resistors for data lines are implemented.
USB_DN
3)
3)
If the USB interface is operated in High Speed mode (480MHz), it is recommended to take
special care routing the data lines USB_DP and USB_DN. Application layout should in this
case implement a differential impedance of 90 ohms for proper signal integrity.
R
S
R
S
VBUS
1µF
2)
Since VUSB_IN is used for detection only it is recommended not to add any further
blocking capacitors on the VUSB_IN line.
Host wakeup
RING0
SMT