User's Manual

PCS3_HD_v01.000-03
Confidential / Preliminary
Page 51 of 101
2013-10-21
PCS3 Hardware Interface Description
3.10 Control Signals


SDPORT=4
0
ms
appr.
34ms
(depends
on
BATT+
capacitors
appr.
1.5s
appr.
4.0s...4.5s
3.10.6 RING0 (ASC0), WAKEUP and LCI_IND Startup Behavior
Table 24 shows the startup behavior of the control lines described in the above sections.
Power startup undefined
ASC0 set up (by firmware)
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1st init (power on reset)
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2nd init (startup phase)
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ASC0 ready (by firmware)
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URC Wake up signalling
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Firmware start
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„SYSSTART“
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Sleep mode

CTS0


RXD0



RING0
1)
1)
„keep“
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DSR0


DCD0

TXD0

RTS0

DTR0


WAKEUP


1)
1)
„keep“

2)

LCI_IND

0.6ms 0.6ms t
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151ms

2.6ms


100ms 1)


undefined (port not supplied)
Pull up (appr. 100k)