User's Manual

PCS3_HD_v01.000-03
Confidential / Preliminary
Page 47 of 101
2013-10-21
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PCS3 Hardware Interface Description
3.9 Digital Audio Interface
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3.9.2 I
2
C Interface
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PCS3’s I
2
C compatible interface for FM radio support and Camera
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I2C_SDA and I2C_SCL: I2C control bus Serial data line of the I2C bus (I2C_SDA) – the
standard required pull-up resistor is placed on the QSC device side; a pull-up resistor is not
required in the camera module. Serial clock line of the I2C bus (I2C_SCL) – the standard
required pull-up resistor is placed on the QSC device side; a pull-up resistor is not required in
the camera module.
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The I
2
C interface features and limitation:
Two-wire bus for inter-IC communication
Support for external devices fabricated using any process (1.8 V only)
Support for external functions such as camera sensors, microcontrollers, FM radio ICs, LCD
driver, stereo DAC, and keyboard interface
Two operating modes with different transfer rates
Standard-mode: up to ~100 kbps
Fast-mode: up to ~400 kbps
The controller functions only as an I2C master, not a slave
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Table 13 lists the available I
2
C interface signals.
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Table 13: Overview of I
2
C signal functions
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Signal name
Alternate
name
Signal configuration
inactive
1
I/O Description
I2CDAT I2CDAT
PD I/O
SerialdatalineoftheI2Cbus
I2CCLK
2CCLK
PD I/O
SerialclocklineoftheI2Cbus
1.
Inactive means no call, no tone generation and no external clock mode. PD = Pull down
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