User's Manual

PCS3_HD_v01.000-03
Confidential / Preliminary
Page 36 of 101
2013-10-21
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PCS3 Hardware Interface Description
3.6 USB Interface
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3.6 USB Interface
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PCS3 supports a USB 2.0 Full Speed (12Mbit/s)
compliant. The USB interface is primarily
intended for use as command and data interface and
for downloading firmware.
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The external application is responsible for supplying the VUSB_IN line. This line is used for ca-
ble detection only. The USB part (driver and transceiver) is supplied by means of BATT+. This
is because PCS3 is designed as a self-powered device compliant with the “Universal Serial Bus
Specification Revision 2.0”
1
.
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Module
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USB part
1)
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VREG (3.8V)
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lin. reg.
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SMT
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BATT+
GND
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VBUS
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DP
DN
Detection only
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R
S
R
S
VUSB_IN
USB_DP
2)
USB_DN
2)
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Host wakeup
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RING0
WAKEUP
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1)
All serial (including R
S
)and pull-up resistors for data lines are implemented.
2)
The USB interface is operated in Full Speed (12Mbit/s) , it is recommended to take special
care routing the data lines USB_DP and USB_DN. Application layout should in this
case implement a differential impedance of 90Ohm for proper signal integrity.
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Figure 9: USB circuit
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To properly connect the module's USB interface to the external application, a USB 2.0 compat-
ible connector and cable or hardware design is required. For more information on the USB re-
lated electrical signals see Table 22.
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1.
The specification is ready for download on http://www.usb.org/developers/docs/