User's Manual
PCS3_HD_v01.000-03
Confidential / Preliminary
Page 23 of 101
2013-10-21
PCS3 Hardware Interface Description
3.2 Power Supply
3.2
Power Supply
PCS3 needs to be connected to a power supply at the SMT application interface - 6 lines each
BATT+ and GND. There are three separate voltage domains for BATT+:
•
BATT+_CDMA with 2 lines for the first power amplifier supply
•
BATT+_CDMA with 2 lines for the second power amplifier supply
•
BATT+ with 2 lines for the general power management.
The main power supply from an external application has to be a single voltage source and has
to be expanded to three sub paths (star structure). Capacitors should be placed as close as
possible to the BATT+ pads. Figure 3 shows two sample circuits (minimum requirement and
recommended alternative) for decoupling capacitors for BATT+.
Module
SMT interface
BATT+
BATT+_CDMA
BATT+_CDMA
2
2
2
Decoupling capacitor
BATT+
GND
Minimum requirement
+
e.g. 100…220µF
Ultra-low ESR
Module
SMT interface
BATT+
2
BATT+_CDMA
2
BATT+_CDMA
2
Recommended alternative
3x
Decoupling capacitors
e.g. 47µF X5R MLCC
BATT+
GND
Figure 3: Decoupling capacitor(s) for BATT+
In addition, the VDDLP signal on the SMT application interface may be connected to an exter-
nal capacitor or a battery to backup the RTC (see Section 3.5).
The power supply of PCS3 must be able to provide the peak current during the uplink transmis-
sion.
All key functions for supplying power to the device are handled by the power management IC.
It provides the following features:
•
Stabilizes the supply voltages for the baseband using switching regulators and low drop lin-
ear voltage regulators.
•
Switches the module's power voltages for the power-up and -down procedures.
•
Delivers, across the VEXT line, a regulated voltage for an external application. This voltage
is not available in Power-down mode and can be reduced via AT command to save power
(see Table 22: VEXT).