User's Manual
Table Of Contents
- Document history
- Introduction
- Product concept
- Application Interface
- Antenna interface
- Electrical, reliability and radio characteristics
- Mechanics
- Reference Approval
- Design example
- List of parts and accessories

MC55/56 Hardware Interface Description
Confidential / Preliminary
s
MC55/56_hd_v03.00 Page 5 of 104 16.08.2005
Figures
Figure 1: MC55/56 block diagram .......................................................................................... 21
Figure 2: Power supply limits during transmit burst................................................................ 26
Figure 3: Power-on by ignition signal ..................................................................................... 28
Figure 4: Timing of power-on process if VDDLP is not used.................................................. 29
Figure 5: Timing of power-on process if VDDLP is fed from external source......................... 30
Figure 6: Deactivating GSM engine by /EMERGOFF signal.................................................. 33
Figure 7: Schematic of approved charging transistor, trickle charging and ESD protection ..38
Figure 8: Battery pack circuit diagram....................................................................................39
Figure 9: Charging process .................................................................................................... 41
Figure 10: Timing of /CTS signal (example for a 2.12 s paging cycle)................................... 46
Figure 11: Beginning of power saving if CFUN=5 or 7........................................................... 46
Figure 12: RTC supply from capacitor.................................................................................... 50
Figure 13: RTC supply from rechargeable battery .................................................................50
Figure 14: RTC supply from non-chargeable battery .............................................................50
Figure 15: Serial interfaces ....................................................................................................51
Figure 16: Audio block diagram.............................................................................................. 54
Figure 17: Schematic of microphone inputs ........................................................................... 55
Figure 18: DAI timing on transmit path................................................................................... 57
Figure 19: DAI timing on receive path .................................................................................... 57
Figure 20: SIM card holder of DSB45 Support Box................................................................60
Figure 21: Pin numbers of Molex SIM card holder on DSB45 Support Box........................... 60
Figure 22: SYNC signal during transmit burst ........................................................................ 62
Figure 23: LED Circuit (Example)...........................................................................................64
Figure 24: Incoming voice call................................................................................................65
Figure 25: URC transmission ................................................................................................. 65
Figure 26: U.FL-R-SMT connector ......................................................................................... 66
Figure 27: Antenna pad and GND plane ................................................................................ 66
Figure 28: Never use antenna connector and antenna pad at the same time ....................... 67
Figure 29: Restricted area around antenna pad..................................................................... 67
Figure 30: Mechanical dimensions of U.FL-R-SMT connector...............................................69
Figure 31: U.FL-R-SMT connector with U.FL-LP-040 plug ....................................................70
Figure 32: U.FL-R-SMT connector with U.FL-LP-066 plug ....................................................70
Figure 33: Specifications of U.FL-LP-(V)-040(01) plug .......................................................... 71
Figure 34: Pin assignment (top view on MC55/56) ................................................................ 74
Figure 35: Typical current consumption vs. power control level............................................. 83
Figure 36: Typical current consumption vs. return loss.......................................................... 84
Figure 37: Audio programming model ....................................................................................86
Figure 38: MC55/56 – top view ..............................................................................................93
Figure 39: MC55/56 bottom view ........................................................................................... 93
Figure 40: Mechanical dimensions of MC55/56 ..................................................................... 94
Figure 41: Hirose DF12C receptacle on MC55/56 .................................................................96
Figure 42: Header Hirose DF12 series................................................................................... 96
Figure 43: Mechanical dimensions of Hirose DF12 connector............................................... 97
Figure 44: Reference equipment for approval........................................................................ 98
Figure 45: Schematic diagram of MC55/56 sample application ...........................................102