User's Manual
Table Of Contents
- Contents
- Tables
- Figures
- 1 Introduction
- 2 Interface Characteristics
- 2.1 Application Interface
- 2.1.1 Pad Assignment
- 2.1.2 Signal Properties
- 2.1.3 USB Interface
- 2.1.4 Serial Interface ASC0
- 2.1.5 Serial Interface ASC1
- 2.1.6 UICC/SIM/USIM Interface
- 2.1.7 Digital Audio Interface
- 2.1.8 Pulse Code Modulation Interface (PCM)
- 2.1.9 Inter IC Sound Interface (I2S)
- 2.1.10 GPIO Interface
- 2.1.11 I2C Interface
- 2.1.12 SPI Interface
- 2.1.13 Pulse Counter
- 2.1.14 HSIC Interface (ELS51-VA Only)
- 2.1.15 SDIO Interface (ELS51-VA Only)
- 2.1.16 Control Signals
- 2.2 RF Antenna Interface
- 2.3 Sample Application
- 2.1 Application Interface
- 3 Operating Characteristics
- 3.1 Operating Modes
- 3.2 Power Up/Power Down Scenarios
- 3.3 Power Saving
- 3.4 Power Supply
- 3.5 Operating Temperatures
- 3.6 Electrostatic Discharge
- 3.7 Blocking against RF on Interface Lines
- 3.8 Reliability Characteristics
- 4 Mechanical Dimensions, Mounting and Packaging
- 5 Regulatory and Type Approval Information
- 6 Document Information
- 7 Appendix
Cinterion
®
ELS31-VA/ELS51-VA Hardware Interface Description
2.3 Sample Application
56
ELS31-VA_ELS51-VA_HID_v01.000 2017-01-04
Confidential / Preliminary
Page 56 of 106
2.3.1 Prevent Back Powering
Because of the very low power consumption design, current flowing from any other source into
the module circuit must be avoided in any case, for example reverse current from high state
external control lines while the module is powered down. Therefore, the controlling application
must be designed to prevent reverse current flow. Otherwise there is the risk of undefined
states of the module during startup and shutdown or even of damaging the module.
A simple solution preventing back powering is the usage of V180 for level shifters, as Figure
30 shows.
While the module is in power down mode, V180 must have a level lower than 0.3V after
certain time. If this is not the case the module is fed back by the application interface - recog-
nizing such a fault state is possible by V180.
2.3.2 Sample Level Conversion Circuit
Depending on the micro controller used by an external application the module‘s digital input
and output lines (i.e., ASC0, ASC1 or GPIO lines) may require level conversion. The following
Figure 30 shows a sample circuit with recommended level shifters for an external application‘s
micro controller (with VLOGIC between 3.0V...3.6V). The level shifters can be used for digital
input and output lines with V
OH
max=1.85V or V
IH
max =1.85V.
Figure 30: Sample level conversion circuit
Note: Bidirectional level shifters without directions control signal are not suitable for RTS0 and
DCD0 as they may force the module into a wrong state while starting up.
5V tolerarant
Low level input
Low level input
Low level input
VCC
5V tolerant
VCC
E.g.,
74VHC1GT50
74LV1T34
E.g.,
74LVC2G34
NC7WZ16
External application
Micro controller
VLOGIC
(3.0V...3.6V)
Input lines,
e.g., µRXD, µCTS
Output lines,
e.g., µTXD, µRTS
V180 (1.8V)
Digital output lines,
e.g., RXDx, CTSx
Wireless module
Digital input lines,
e.g., TXDx, RTSx