User's Manual
Table Of Contents
- Contents
- Tables
- Figures
- 1 Introduction
- 2 Interface Characteristics
- 2.1 Application Interface
- 2.1.1 Pad Assignment
- 2.1.2 Signal Properties
- 2.1.3 USB Interface
- 2.1.4 Serial Interface ASC0
- 2.1.5 Serial Interface ASC1
- 2.1.6 UICC/SIM/USIM Interface
- 2.1.7 Digital Audio Interface
- 2.1.8 Pulse Code Modulation Interface (PCM)
- 2.1.9 Inter IC Sound Interface (I2S)
- 2.1.10 GPIO Interface
- 2.1.11 I2C Interface
- 2.1.12 SPI Interface
- 2.1.13 Pulse Counter
- 2.1.14 HSIC Interface (ELS51-VA Only)
- 2.1.15 SDIO Interface (ELS51-VA Only)
- 2.1.16 Control Signals
- 2.2 RF Antenna Interface
- 2.3 Sample Application
- 2.1 Application Interface
- 3 Operating Characteristics
- 3.1 Operating Modes
- 3.2 Power Up/Power Down Scenarios
- 3.3 Power Saving
- 3.4 Power Supply
- 3.5 Operating Temperatures
- 3.6 Electrostatic Discharge
- 3.7 Blocking against RF on Interface Lines
- 3.8 Reliability Characteristics
- 4 Mechanical Dimensions, Mounting and Packaging
- 5 Regulatory and Type Approval Information
- 6 Document Information
- 7 Appendix
Cinterion
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ELS31-VA/ELS51-VA Hardware Interface Description
2.2 RF Antenna Interface
56
ELS31-VA_ELS51-VA_HID_v01.000 2017-01-04
Confidential / Preliminary
Page 49 of 106
2.2.3.2 Line Arrangement Examples
Several dedicated tools are available to calculate line arrangements for specific applications
and PCB materials - for example from http://www.polarinstruments.com/ (commercial software)
or from http://web.awrcorp.com/Usa/Products/Optional-Products/TX-Line/ (free software).
Embedded Stripline
This figure below shows a line arrangement example for embedded stripline with 65µm FR4
prepreg (type: 1080) and 710µm FR4 core (4-layer PCB).
Figure 24: Embedded Stripline with 65µm prepreg (1080) and 710µm core