User's Manual

Cinterion
®
ALS3-US R4 Hardware Interface Overview
Figures
44
ALS3-USR4_HIO_v03.915 2017-03-27
Confidential / Preliminary
Page 5 of 44
Figures
Figure 1: ALS3-US R4 system overview....................................................................... 18
Figure 2: Decoupling capacitor(s) for BATT+................................................................ 21
Figure 3: USB circuit ..................................................................................................... 22
Figure 4: Serial interface ASC0..................................................................................... 23
Figure 5: First UICC/SIM/USIM interface ...................................................................... 25
Figure 6: Second UICC/SIM/USIM interface................................................................. 25
Figure 7: Embedded Stripline line arrangement............................................................ 30
Figure 8: Micro-Stripline line arrangement samples...................................................... 31
Figure 9: Routing to application‘s RF connector ........................................................... 32
Figure 10: ALS3-US R4 evaluation board layer table ..................................................... 32
Figure 11: Supply voltage for active GNSS antenna....................................................... 33
Figure 12: ESD protection for passive GNSS antenna ................................................... 34
Figure 13: ALS3-US R4 – top and bottom view .............................................................. 35
Figure 14: Dimensions of ALS3-US R4 (all dimensions in mm)...................................... 36
Figure 15: ALS3-US R4 sample application.................................................................... 38
Figure 16: Reference equipment for type approval......................................................... 39