Service Manual

SECTION 3
3-1
Part No. 001-3474-002
PROGRAMMING
3.1 INTRODUCTION
The information in Section 3.2 describes synthesizer programming protocol. This information can be used as
a basis for designing the synthesizer programming hardware and software required.
3.2 DM3474 SYNTHESIZER DATA PROTOCOL
Programming of the dividers and the charge pumps are performed on a 3-line bus; SYNTH ENABLE,
SYNTH DATA, AND SYNTH CLK. On initial power up three 34-bit words are required to load the 3474 Data
Transceiver. After the initial load, one 32-bit word can be used to change channels.
The SA7025 Synthesizer IC uses four address words; D, C, B and A (see Figure 3-4). The C word is not used
in the 3474. The 24- and 32-bit words contain one or four address bits, depending on the address bits, the data is
latched into registers. When the A-word is loaded, the data of these temporary registers is loaded together with the
A-word into the work
registers.
3.2.1 D-WORD
Refer to Figure 3-1.
TCXO Reference Frequency is 17.5 MHz.
Loop Reference Frequency is 50 kHz.
Reference Divide (NR) = 17.5 MHz ÷ 50 kHz =350 Decimal or 000101011110 Binary.
The 3474 has frequency resolution of 6.25 kHz and 10 kHz. When programming 6.25 kHz frequency
resolution use FMOD=8. When programming 10 kHz frequency resolution use FMOD=5.
Example:
(FCM) ÷ FMOD = 50 kHz ÷ 8 = 6.25 kHz
(FCM) ÷ FMOD = 50 kHz ÷ 5 = 10 kHz
Where:
FCM = Loop Reference Frequency
FMOD = Fractional N Modulus
Since FMC is the same for both 6.25 kHz and 10 kHz the loop dynamics are very similar and the same loop
filter values can be used.