User's Manual

GS2100M Low Power WiFi Module Data Sheet Electrical Characteristics
Sigma Delta ADC Parameters
GS2100M-DS-001212, Release 0.10 Confidential Preliminary 47
Notes:
1. The D/A output is fully differential. The Analog power supply is 3.3V +/-
10%.
2. Full scale (FS) can be trimmed in the reference generator. The gain error
specified is on top of the reference level error.
3. The master clock frequency is always 250 times higher than data clock rate.
4. Assumes a -1 dB full scale input and corrected for full scale. Fin can be from 0
to 10KHz. The SNR is met for all master clock frequencies.
Total Harmonic
Distortion (THD)
-70 dB
A/D DC Performance
Resolution 16 Bits
Integral Non-Linearity
Error (INL)
+2 LSB
Differential
Non-Linearity Error
(DNL)
+1 LSB
Full Scale 2.0 V
Input common-mode
level
VIN_3V3/2
Gain Error
+3 %
Offset
+10 LSB
A/D Dynamic Performance
Data Rate 32 80 KHz
Clock Frequency 8 20 MHz see Note 3
Signal-to-Noise Ratio
(SNR)
80 84 dB see Note 4
Total Harmonic
Distortion (THD)
-70 dB see Note 4
Input Resistance 100 KΩ
Table 16 ADC Parameters (Continued)
Parameter Minimum Typical Maximum Unit Notes