User's Manual
Table Of Contents
- Table of Contents
- Chapter 1 GS2100M Overview
- Chapter 2 GS2100M Architecture
- Chapter 3 Pin-out and Signal Description
- Chapter 4 Electrical Characteristics
- Chapter 5 Package and Layout Guidelines
GS2100M Low Power WiFi Module Data Sheet Pin-out and Signal Description
GS2100Mxx Device Pin-out
GS2100M-DS-001212, Release 0.10 Confidential Preliminary 37
3.1.2 GS2100M Pin MUX Function
The GS2100M pins have multiple functions that can be selected using mux function by
software. Table 8, page 37 shows the various MUX functions for each pin. Each pin can be
independently configured. Table below shows the various mux functions for each pin. All
I/O pins are GPIO inputs at reset. For pins that are inputs to functional blocks only one pin
may be assigned to any input function. For example, UART1_RX may be assigned to
GPIO9 but not to both GPIO9 and GPIO37.
Table 8 GS2100M Pin MUX Description
Alternate Functions Available
Pin# Pin Name Internal
Pull
Resistor
mA Mux3 Mux4 Mux5 Mux7 Comments
1 GND
2 adc_sd_0p
3 adc_sd_0n
4 adc_sd_1p
5 adc_sd_1n
6 adc_sd_2p
7 adc_sd_2n
8NC
9NC
10 VRTC
11 ext_rtc_reset_n pull-up (u)
12 rtc_io_2 u/d 1 Alarm or wake
up pin
13 VPP Programming
voltage for OTP
memory
14 GND
15 VIN_3V3
16 gpio10/pwm0 pull-down (d) 4 pwm0 reserved reserved clk_rtc
17 gpio9/i2c_clk d 12
i2c_clk uart1_rx reserved i2s_lrclk
18 gpio8/i2c_data d 12
i2c_data uart1_tx reserved reserved
19 gpio32/sdio_dat2/uart1_tx d 4 sdio_data2 wuart_tx uart1_tx spi1_cs_n_12
20 gpio33/sdio_dat3/spi0_cs_n_0 u 4 sdio_data3 reserved uart1_rts spi0_cs_n_0
21 gpio34/sdio_cmd/spi0_din d 4 sdio_cmd reserved usart1_cts spi0_din
22 gpio35/sdio_clk/spi0_clk d 4 sdio_clk reserved i2c_clk spi0_clk Note: only 4mA
for i2C
23 gpio36/sdio_dat0_dout d 4 sdio_data0 reserved i2c_data spi0_dout
24 gpio37/sdio_dat1_int d 4 sdio_data1 wuart_rx uart1_rx spi0_cs_n_10
25 NC
26 NC
27 gpio1/uart0_tx d 4 uart0_tx wuart_tx pwm1 spi1_dout