Datasheet

© Copyright 2009 Future Technology Devices International Ltd
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Document Reference No.: FT_000202
UM245R USB - Parallel FIFO Development Module Datasheet Version 1.04
Clearance No.: FTDI# 124
4.4 FT245 FIFO Control Interface Read Cycle Timing Diagrams
Figure 4.2 FIFO Read Cycle
Time
Description
Min
Max
Unit
T1
RD# Active Pulse Width
50
ns
T2
RD# to RD# Pre-Charge Time
50 + T6
ns
T3
RD# Active to Valid Data*
20
50
ns
T4
Valid Data Hold Time from RD# Inactive*
0
ns
T5
RD# Inactive to RXF#
0
25
ns
T6
RXF# Inactive After RD# Cycle
80
ns
Table 4.4 FIFO Read Cycle Timings
* Load = 30pF