Schematic
PWR_FLAG
PWR_FLAG
PWR_FLAG
PWR_FLAG
VDDPLL
C519
10uF
C514
100nF
L505
MH2029−300Y
VDDOUT
C507
10uF
C509
100nF
C516
100nF
C511
100nF
C521
100nF
C523
100nF
4xVDDCORE 100nF decoupling caps + 1x filter cap
Place near MCU
6x 100nF decoupling, 1ea for MCU pins: VDDIN, VDDBU, 4xVDDIO
C526
100nF
C527
100nF
C524
100nF
C522
100nF
C515
100nF
C520
100nF
+3.3V
+3.3V
L504
MH2029−300Y
C513
100nF
C518
10uF
VDDOUTMI
VDDANA
C517
10uF
C512
100nF
L503
MH2029−300Y
+3.3V
MCU Power Decoupling
VBUSPO: VBus Polarity Off
0: The UOTGVBOF output signal is in its default mode (active high)
1: The UOTGVBOF output signal is inverted (active low)
Forces off the power supply to USB port
when the USB port is in HOST mode
(and the board is powered from an external supply via VIN)
+5V
C504
100nF
VIN
+5V
USBVCCU2
USBVCC
D
G
S
D
D
G
G
S
S
U504
FDN340P
D
G
S
D
D
G
G
S
S
U503
FDN340P
GATE_CMD
CMP
+3.3V
PWR_FLAG
V−
4
V+
8
+
5
−
6
7
U203B
LMV358IPWR
C503
100nF
1
2
R502A
100K
5
6
R502C
100K
7
8
R502D
100K
3
4
R502B
100K
B
C
E
Q501
BC847BSMD
R501
1K
UOTGVBOF
USB Power
+3.3V
C528
10uF
GND
1
VO
2
VI
3
U505
NCP1117ST33T3G
3.3V Regulator
PWR_FLAG
R505
10K
R504
52K3
D503
SK34A−LTP
C510
100uF 16V
L502
10uH SRR0604−100ML
D502
CD1206−S01575
C505
10nF
BOOST
1
GND
2
FB
3
EN
4
VIN
5
SW
6
U502
LM2734Y
R503
10K
+5V
C502
10uF 25V
5V Regulator
VIN
C501
47uF 25V
D501
1N4004
L501
MH2029−300Y
GND
1
PWR
2
GNDBREAK
3
U501
POWERJACK
Vin
BUCK_FB
BUCK_OUT
BUCK_SW
POWER_JACK
PWR_FLAG
VDDOUT
C506
10uF
7−12V Recommended,
6−20V Possible.