Datasheet

System Integration Module (SIM)
SIM Registers
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
MOTOROLA System Integration Module (SIM) 99
NON-DISCLOSURE AGREEMENT REQUIRED
7.9.3 Break Status Register
The break status register (BSR) contains a flag to indicate that a break
caused an exit from wait mode. This register is only used in emulation
mode.
SBSW — SIM Break Stop/Wait
This status bit is useful in applications requiring a return to wait mode
after exiting from a break interrupt. Clear SBSW by writing a logic 0 to
it. Reset clears SBSW.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
SBSW can be read within the break state SWI routine. The user can
modify the return address on the stack by subtracting one from it.
Address: $FE00
Bit 7654321Bit 0
Read:
RRRRRR
SBSW
R
Write: Note
1
Reset: 0
R = Reserved 1. Writing a logic 0 clears SBSW.
Figure 7-22. Break Status Register (BSR)