Datasheet

System Integration Module (SIM)

SIM Registers

MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1

MOTOROLA System Integration Module (SIM) 97

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POR — Power-On Reset Bit

1 = Last reset caused by POR circuit

0 = Read of SRSR

PIN — External Reset Bit

1 = Last reset caused by external reset pin (RST)

0 = POR or read of SRSR

COP — Computer Operating Properly Reset Bit

1 = Last reset caused by COP counter

0 = POR or read of SRSR

ILOP — Illegal Opcode Reset Bit

1 = Last reset caused by an illegal opcode

0 = POR or read of SRSR

ILAD — Illegal Address Reset Bit (opcode fetches only)

1 = Last reset caused by an opcode fetch from an illegal address

0 = POR or read of SRSR

MODRST — Monitor Mode Entry Module Reset bit

1 = Last reset caused by monitor mode entry when vector locations

$FFFE and $FFFF are $FF after POR while IRQB = V

0 = POR or read of SRSR

LVI — Low Voltage Inhibit Reset bit

1 = Last reset caused by LVI circuit

0 = POR or read of SRSR