Datasheet

System Integration Module (SIM)
SIM Counter
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
MOTOROLA System Integration Module (SIM) 85
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7.6 SIM Counter
The SIM counter is used by the power-on reset module (POR) and in
stop mode recovery to allow the oscillator time to stabilize before
enabling the internal bus (IBUS) clocks. The SIM counter also serves as
a prescaler for the computer operating properly module (COP). The SIM
counter uses 12 stages for counting, followed by a 13th stage that
triggers a reset of SIM counters and supplies the clock for the COP
module. The SIM counter is clocked by the falling edge of BUSCLKX4.
7.6.1 SIM Counter During Power-On Reset
The power-on reset module (POR) detects power applied to the MCU.
At power-on, the POR circuit asserts the signal PORRST. Once the SIM
is initialized, it enables the oscillator to drive the bus clock state machine.
7.6.2 SIM Counter During Stop Mode Recovery
The SIM counter also is used for stop mode recovery. The STOP
instruction clears the SIM counter. After an interrupt, break, or reset, the
SIM senses the state of the short stop recovery bit, SSREC, in the
configuration register 1 (CONFIG1). If the SSREC bit is a logic 1, then
the stop recovery is reduced from the normal delay of 4096 BUSCLKX4
cycles down to 32 BUSCLKX4 cycles. This is ideal for applications using
canned oscillators that do not require long start-up times from stop
mode. External crystal applications should use the full stop recovery
time, that is, with SSREC cleared in the configuration register 1
(CONFIG1).
7.6.3 SIM Counter and Reset States
External reset has no effect on the SIM counter (see 7.8.2 Stop Mode
for details.) The SIM counter is free-running after all reset states. See
7.5.2 Active Resets from Internal Sources for counter control and
internal reset recovery sequences.