Datasheet

MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
76 System Integration Module (SIM) MOTOROLA
System Integration Module (SIM)
NON-DISCLOSURE AGREEMENT REQUIRED
7.7.5 Status Flag Protection in Break Mode . . . . . . . . . . . . . . . . .93
7.8 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93
7.8.1 Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93
7.8.2 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95
7.9 SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96
7.9.1 SIM Reset Status Register . . . . . . . . . . . . . . . . . . . . . . . . . .96
7.9.2 Break Flag Control Register. . . . . . . . . . . . . . . . . . . . . . . . .98
7.9.3 Break Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99
7.2 Introduction
This section describes the system integration module (SIM), which
supports up to 24 external and/or internal interrupts. Together with the
central processor unit (CPU), the SIM controls all microcontroller unit
(MCU) activities. A block diagram of the SIM is shown in Figure 7-1.
Figure 7-2 is a summary of the SIM I/O registers. The SIM is a system
state controller that coordinates CPU and exception timing.
The SIM is responsible for:
• Bus clock generation and control for CPU and peripherals
– Stop/wait/reset/break entry and recovery
– Internal clock control
• Master reset control, including power-on reset (POR) and
computer operating properly (COP) timeout
• Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
• CPU enable/disable timing
• Modular architecture expandable to 128 interrupt sources