Datasheet

MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
40 Memory MOTOROLA
Memory
NON-DISCLOSURE AGREEMENT REQUIRED
$FE02
Break Auxiliary
Register (BRKAR)
See page 207.
Read: 0 0 00000
BDCOP
Write:
Reset:00000000
$FE03
Break Flag Control
Register (BFCR)
See page 209.
Read:
BCFERRRRRRR
Write:
Reset: 0
$FE04
Interrupt Status Register 1
(INT1)
See page 176.
Read: 0 IF5 IF4 IF3 0 IF1 0 0
Write:RRRRRRRR
Reset:00000000
$FE05
Interrupt Status Register 2
(INT2)
See page 176.
Read: IF14 0 000000
Write:RRRRRRRR
Reset:00000000
$FE06
Interrupt Status Register 3
(INT3)
See page 176.
Read: 0 0 00000IF15
Write:RRRRRRRR
Reset:00000000
$FE07 Reserved RRRRRRRR
$FE08
FLASH Control Register
(FLCR)
See page 47.
Read: 0 0 0 0
HVEN MASS ERASE PGM
Write:
Reset:00000000
$FE09
Break Address High
Register (BRKH)
See page 206.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset:00000000
$FE0A
Break Address low
Register (BRKL)
See page 206.
Read:
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Write:
Reset:00000000
$FE0B
Break Status and Control
Register (BRKSCR)
See page 205.
Read:
BRKE BRKA
000000
Write:
Reset:00000000
Addr.Register Name Bit 7654321Bit 0
= Unimplemented R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 6)