Datasheet

Memory
Input/Output (I/O) Section
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
MOTOROLA Memory 39
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$0036
Oscillator Status Register
(OSCSTAT)
See page 111.
Read:
RRRRRRECGON
ECGST
Write:
Reset:00000000
$0037 Unimplemented Read:
$0038
Oscillator Trim Register
(OSCTRIM)
See page 112.
Read:
TRIM7 TRIM6 TRIM5 TRIM4 TRIM3 TRIM2 TRIM1 TRIM0
Write:
Reset:10000000
$0039
↓
$003B
Unimplemented
Unimplemented
$003C
ADC Status and Control
Register (ADSCR)
See page 157.
Read: COCO
AIEN ADCO CH4 CH3 CH2 CH1 CH0
Write:
Reset:00011111
$003D Unimplemented
$003E
ADC Data Register
(ADR)
See page 159.
Read: AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
Write:
Reset: Indeterminate after reset
$003F
ADC Input Clock Register
(ADICLK)
See page 159.
Read:
ADIV2 ADIV1 ADIV0
00000
Write:
Reset:00000000
$FE00
Break Status Register
(BSR)
See page 208.
Read:
RRRRRR
SBSW
R
Write: See note 1
Reset: 0
1. Writing a logic 0 clears SBSW.
$FE01
SIM Reset Status Register
(SRSR)
See page 96.
Read: POR PIN COP ILOP ILAD MODRST LVI 0
Write:
POR:10000000
Addr.Register Name Bit 7654321Bit 0
= Unimplemented R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 6)