Datasheet

General Description
Features
MC68HC908QY4MC68HC908QT4MC68HC908QY2MC68HC908QT2MC68HC908QY1MC68HC908QT1
MOTOROLA General Description 27
NON-DISCLOSURE AGREEMENT REQUIRED
5 or 13 bidirectional input/output (I/O) lines and one input only:
Six shared with keyboard interrupt function and ADC
Two shared with timer channels
One shared with external interrupt (IRQ)
Eight extra I/O lines on 16-pin package only
High current sink/source capability on all port pins
Selectable pullups on all ports, selectable on an individual bit
basis
Three-state ability on all port pins
6-bit keyboard interrupt with wakeup feature (KBI)
Low-voltage inhibit (LVI) module features:
Software selectable trip point in CONFIG register
System protection features:
Computer operating properly (COP) watchdog
Low-voltage detection with reset
Illegal opcode detection with reset
Illegal address detection with reset
External asynchronous interrupt pin with internal pullup (IRQ)
shared with general-purpose input pin
Master asynchronous reset pin (RST
) shared with
general-purpose input/output (I/O) pin
Power-on reset
Internal pullups on IRQ and RST to reduce external components
Memory mapped I/O registers
Power saving stop and wait modes
MC68HC908QY4, MC68HC908QY2, and MC68HC908QY1 are
available in these packages:
16-pin plastic dual in-line package (PDIP)
16-pin small outline integrated circuit (SOIC) package
16-pin thin shrink small outline package (TSSOP)