Datasheet

Break Module (BREAK)
Break Module Registers
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
MOTOROLA Break Module (BREAK) 205
NON-DISCLOSURE AGREEMENT REQUIRED
17.5 Break Module Registers
These registers control and monitor operation of the break module:
• Break status and control register (BRKSCR)
• Break address register high (BRKH)
• Break address register low (BRKL)
• Break status register (BSR)
• Break flag control register (BFCR)
17.5.1 Break Status and Control Register
The break status and control register (BRKSCR) contains break module
enable and status bits.
BRKE — Break Enable Bit
This read/write bit enables breaks on break address register matches.
Clear BRKE by writing a logic 0 to bit 7. Reset clears the BRKE bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled
BRKA — Break Active Bit
This read/write status and control bit is set when a break address
match occurs. Writing a logic 1 to BRKA generates a break interrupt.
Clear BRKA by writing a logic 0 to it before exiting the break routine.
Reset clears the BRKA bit.
1 = Break address match
0 = No break address match
Address: $FE0B
Bit 7654321Bit 0
Read:
BRKE BRKA
000000
Write:
Reset:00000000
= Unimplemented
Figure 17-3. Break Status and Control Register (BRKSCR)