Datasheet

MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
196 Low-Voltage Inhibit (LVI) MOTOROLA
Low-Voltage Inhibit (LVI)
NON-DISCLOSURE AGREEMENT REQUIRED
16.3 Features
Features of the LVI module include:
• Programmable LVI reset
• Programmable power consumption
• Selectable LVI trip voltage
• Programmable stop mode operation
16.4 Functional Description
Figure 16-1 shows the structure of the LVI module. LVISTOP,
LVIPWRD, LVI5OR3, and LVIRSTD are user selectable options found in
the configuration register (CONFIG1). See Section 5. Configuration
Register (CONFIG).
Figure 16-1. LVI Module Block Diagram
The LVI is enabled out of reset. The LVI module contains a bandgap
reference circuit and comparator. Clearing the LVI power disable bit,
LVIPWRD, enables the LVI to monitor V
DD
voltage. Clearing the LVI
reset disable bit, LVIRSTD, enables the LVI module to generate a reset
when V
DD
falls below a voltage, V
TRIPF
. Setting the LVI enable in stop
LOW V
DD
DETECTOR
LVIPWRD
STOP INSTRUCTION
LVISTOP
LVI RESET
LVIOUT
V
DD
> LVITRIP = 0
V
DD
≤ LVITRIP = 1
FROM CONFIG
FROM CONFIG
V
DD
FROM CONFIG
LVIRSTD
LVI5OR3
FROM CONFIG