Datasheet

MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
172 External Interrupt (IRQ) MOTOROLA
External Interrupt (IRQ)
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13.4 Functional Description
IRQ pin functionality is enabled by setting configuration register 2
(CONFIG2) IRQEN bit accordingly. A 0 disables the IRQ function and
IRQ will assume the other shared functionalities. A1 enables the IRQ
function.
A logic 0 applied to the external interrupt pin can latch a central
processur unit (CPU) interrupt request. Figure 13-1 shows the structure
of the IRQ module.
Interrupt signals on the IRQ pin are latched into the IRQ latch. An
interrupt latch remains set until one of the following actions occurs:
• Vector fetch — A vector fetch automatically generates an interrupt
acknowledge signal that clears the IRQ latch.
• Software clear — Software can clear the interrupt latch by writing
to the acknowledge bit in the interrupt status and control register
(ISCR). Writing a logic 1 to the ACK1 bit clears the IRQ latch.
• Reset — A reset automatically clears the interrupt latch.
Figure 13-1. IRQ Module Block Diagram
ACK1
IMASK1
DQ
CK
CLR
IRQ
HIGH
INTERRUPT
TO MODE
SELECT
LOGIC
IRQ
FF
REQUEST
V
DD
MODE1
VOLTAGE
DETECT
SYNCHRO-
NIZER
IRQF1
TO CPU FOR
BIL/BIH
INSTRUCTIONS
VECTOR
FETCH
DECODER
INTERNAL ADDRESS BUS
RESET
V
DD
INTERNAL
PULLUP
DEVICE
IRQ
IRQPUD