Datasheet

Monitor ROM (MON)
Functional Description
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
MOTOROLA Monitor ROM (MON) 119
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Figure 9-4. Low-Voltage Monitor Mode Entry Flowchart
9.4.1 Forced Monitor Mode
If the voltage applied to the IRQ is less than V
TST
, the MCU will come
out of reset in user mode. The MENRST module monitors the reset
vector fetches and will assert an internal reset if it detects that the reset
vectors are erased ($FF). When the MCU comes out of reset, it is forced
into monitor mode without requiring high voltage on the IRQ pin. Once
out of reset, the monitor code is initially executing off the internal clock
at its default frequency.
If IRQ is tied high, all pins will default to regular input port functions
except for PTA0 and PTA5 which will operate as a serial communication
port and OSC1 input respectively (refer to Figure 9-1). That will allow the
clock to be driven from an external source through OSC1 pin.
If IRQ is tied low, all pins will default to regular input port function except
for PTA0 which will operate as serial communication port. Refer to
Figure 9-2.
Regardless of the state of the IRQ pin, it will not function as a port input
pin in monitor mode. Bit 2 of the Port A data register will always read 0.
IS VECTOR
BLANK?
POR
TRIGGERED?
NORMAL USER
MODE
MONITOR MODE
EXECUTE
MONITOR
CODE
NO
NO
YES
YES
POR RESET