Datasheet

Monitor ROM (MON)
Functional Description
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
MOTOROLA Monitor ROM (MON) 117
NON-DISCLOSURE AGREEMENT REQUIRED
Figure 9-3. Monitor Mode Circuit (External Clock, with High Voltage)
9.8304 MHz CLOCK
+
10 kΩ*
V
DD
10 kΩ*
RST (PTA3)
IRQ
(PTA2)
PTA0
0.1 µF
OSC1 (PTA5)
8
7
DB9
2
3
5
16
15
2
6
10
9
V
DD
MAX232
V+
V–
1 µF
+
1
2
3
4
5
6
74HC125
74HC125
10 kΩ
PTA1
PTA4
V
SS
0.1 µF
V
DD
1 k Ω
9.1 V
C1+
C1–
5
4
1 µF
C2+
C2–
+
3
1
1 µF
+
1 µF
V
DD
+
1 µF
V
TST
* Value not critical
V
DD
V
DD
10 kΩ*
Table 9-1. Monitor Mode Signal Requirements and Options
Mode IRQ RST
$FFFE/
$FFFF
PTA1 PTA4
External
Clock
(MHz)
Bus
Frequency
(MHz)
COP Comment
V
TST
monitor
mode
V
TST
V
DD
X 1 0 9.8304 2.4576 Disabled
PTA1 and PTA4 voltages
are required. RST
and
OSC1 functions are
active
Forced
monitor
mode
V
DD
X
$FF
(blank)
X X 9.8304 2.4576 Disabled
OSC1 function is active.
RST
and IRQ only
available if later
configured.
Forced
monitor
mode
V
SS
X
$FF
(blank)
XX X 3.2Disabled
RST
, IRQ, and OSC1
only available if later
configured.
User
mode
V
DD
or
V
SS
X
Not
$FF
(programmed)
XX X — Enabled
Enters user mode
RST pin only available if
later configured