Datasheet

MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
116 Monitor ROM (MON) MOTOROLA
Monitor ROM (MON)
NON-DISCLOSURE AGREEMENT REQUIRED
Figure 9-1. Monitor Mode Circuit (External Clock, No High Voltage)
Figure 9-2. Monitor Mode Circuit (Internal Clock, No High Voltage)
RST (PTA3)
IRQ
(PTA2)
PTA0
OSC1 (PTA5)
8
7
DB9
2
3
5
16
15
2
6
10
9
V
DD
1 µF
MAX232
V+
V–
V
DD
1 µF
+
1
2
3
4
5
6
74HC125
74HC125
10 kΩ
N.C.PTA1
N.C.PTA4
V
SS
0.1 µF
V
DD
9.8304 MHz CLOCK
C1+
C1–
5
4
1 µF
C2+
C2–
+
3
1
1 µF
+
+
+
1 µF
V
DD
10 kΩ*
* Value not critical
N.C.
RST (PTA3)
IRQ
(PTA2)
PTA0
10 kΩ
*
OSC1 (PTA5)N.C.
8
7
DB9
2
3
5
16
15
2
6
10
9
V
DD
1 µF
MAX232
C1+
C1–
V+
V–
5
4
1 µF
C2+
C2–
V
DD
1 µF
+
1
2
3
4
5
6
74HC125
74HC125
10 kΩ
N.C.PTA1
N.C.PTA4
V
SS
0.1 µF
V
DD
+
3
1
1 µF
+
+
+
1 µF
V
DD
* Value not critical
N.C.