Board Users Guide

MPC5200B Users Guide, Rev. 1
7-56 Freescale Semiconductor
General Purpose Timers (GPT)
7.4.4 GPT Registers—MBAR + 0x0600
Each GPT uses 4 32-bit registers. These registers are located at an offset from MBAR of 0x0600. Register addresses are relative to this offset.
Therefore, the actual register address is: MBAR + 0x0600 + register address
Hyperlinks to the Interrupt Controller registers are provided below:
7.4.4.1 GPT 0 Enable and Mode Select Register—MBAR + 0x0600
GPT 1 Enable and Mode Select Register—MBAR + 0x0610
GPT 2 Enable and Mode Select Register—MBAR + 0x0620
GPT 3 Enable and Mode Select Register—MBAR + 0x0630
GPT 4 Enable and Mode Select Register—MBAR + 0x0640
GPT 5 Enable and Mode Select Register—MBAR + 0x0650
GPT 6 Enable and Mode Select Register—MBAR + 0x0660
GPT 7 Enable and Mode Select Register—MBAR + 0x0670
• GPT 0 Enable and Mode Select Register (0x0600)
• GPT 1 Enable and Mode Select Register (0x0610)
• GPT 2 Enable and Mode Select Register (0x0620)
• GPT 3 Enable and Mode Select Register (0x0630)
• GPT 4 Enable and Mode Select Register (0x0640)
• GPT 5 Enable and Mode Select Register (0x0650)
• GPT 6 Enable and Mode Select Register (0x0660)
• GPT 7 Enable and Mode Select Register (0x0670)
• GPT 0 PWM Configuration Register (0x0608)
• GPT 1 PWM Configuration Register (0x0618)
• GPT 2 PWM Configuration Register (0x0628)
• GPT 3 PWM Configuration Register (0x0638)
• GPT 4 PWM Configuration Register (0x0648)
• GPT 5 PWM Configuration Register (0x0658)
• GPT 6 PWM Configuration Register (0x0668)
• GPT 7 PWM Configuration Register (0x0678)
• GPT 0 Counter Input Register (0x0604)
• GPT 1 Counter Input Register (0x0614)
• GPT 2 Counter Input Register (0x0624)
• GPT 3 Counter Input Register (0x0634)
• GPT 4 Counter Input Register (0x0644)
• GPT 5 Counter Input Register (0x0654)
• GPT 6 Counter Input Register (0x0664)
• GPT 7 Counter Input Register (0x0674)
• GPT 0 Status Register (0x060C)
• GPT 1 Status Register (0x061C)
• GPT 2 Status Register (0x062C)
• GPT 3 Status Register (0x063C)
• GPT 4 Status Register (0x064C)
• GPT 5 Status Register (0x065C)
• GPT 6 Status Register (0x066C)
• GPT 7 Status Register (0x067C)
Table 7-47. GPT 0 Enable and Mode Select Register
GPT 1 Enable and Mode Select Register
GPT 2 Enable and Mode Select Register
GPT 3 Enable and Mode Select Register
GPT 4 Enable and Mode Select Register
GPT 5 Enable and Mode Select Register
GPT 6 Enable and Mode Select Register
GPT 7 Enable and Mode Select Register
msb 012345678 9 101112131415
ROCPWReserved OCT Reserved ICT
W
RESET
:
0 00000000 0 0 0 00 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 lsb
RWDen
Reserved CE Rsvd
Stop_Cont
Open_Drn
IntEn Reserved GPIO Rsvd Timer_MS
W
RESET:0 00000000 0 0 0 00 0 0