Circuit Board Reference Manual

MCF548x Reference Manual, Rev. 3
29-10 Freescale Semiconductor
29.2.2.2 USB Control Register (USBCR)
The USBCR configures features of the module.
6–4 — Reserved, should be cleared.
3–0 ISOERREP Isochronous error endpoint. This is the endpoint number for the isochronous OUT endpoint
that has experienced a PID sequencing error and caused the ISO_ERR interrupt to assert.
The value in this register will always reflect the endpoint number for the last isochronous
OUT endpoint to experience a PID sequencing error (or 0x0 if no PID sequencing errors
have occurred). It is not cleared along with the USBISR[ISOERR] interrupt bit.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R Uninitialized
W
Reset Uninitialized
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R Uninitialized RAM
SPLIT
—RAM
EN
0 APP
LOCK
0
W RST RESUME
Reset Uninitialized 0000000 0
Reg
Addr
MBAR + 0xB404
Figure 29-3. USB Control Register (USBCR)
Table 29-2. USBSR Field Descriptions
Bits Name Description