Circuit Board Reference Manual

MCF548x Reference Manual, Rev. 3
27-34 Freescale Semiconductor
27.8.3 Delay Settings
Table 27-23 shows the values for the delay after transfer (t
DT
) and CS to DSPISCK delay (t
CSC
) that can
be generated based on the prescaler values and the scaler values set in the DCTARn registers. The values
calculated assume a 100MHz system frequency.
Table 27-22. Baud Rate Values
Baud Rate Divider Prescaler Values
2357
Baud Rate Scaler Values
2
25.0MHz 16.7MHz 10.0MHz 7.14MHz
4
12.5MHz 8.33MHz 5.00MHz 3.57MHz
6
8.33MHz 5.56MHz 3.33MHz 2.38MHz
8
6.25MHz 4.17MHz 2.50MHz 1.79MHz
16
3.12MHz 2.08MHz 1.25MHz 893KHz
32
1.56MHz 1.04MHz 625KHz 446KHz
64
781KHz 521KHz 312KHz 223KHz
128
391KHz 260KHz 156KHz 112KHz
256
195KHz 130KHz 78.1KHz 55.8KHz
512
97.7KHz 65.1KHz 39.1KHz 27.9KHz
1024
48.8KHz 32.6KHz 19.5KHz 14.0KHz
2048
24.4KHz 16.3KHz 9.77KHz 6.98KHz
4096
12.2KHz 8.14KHz 4.88KHz 3.49KHz
8192
6.10KHz 4.07KHz 2.44KHz 1.74KHz
16384
3.05KHz 2.04KHz 1.22KHz 872
32768
1.53KHz 1.02KHz 610 436