Microcontrollers Data Sheet

Timer Interface A (TIMA)
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
228 Freescale Semiconductor
16.7.3 TIMA Counter Modulo Registers
The read/write TIMA modulo registers contain the modulo value for the TIMA counter. When the TIMA
counter reaches the modulo value, the overflow flag (TOF) becomes set, and the TIMA counter resumes
counting from $0000 at the next timer clock. Writing to the high byte (TAMODH) inhibits the TOF bit and
overflow interrupts until the low byte (TAMODL) is written. Reset sets the TIMA counter modulo registers.
NOTE
Reset the TIMA counter before writing to the TIMA counter modulo registers.
16.7.4 TIMA Channel Status and Control Registers
Each of the TIMA channel status and control registers:
• Flags input captures and output compares
• Enables input capture and output compare interrupts
• Selects input capture, output compare, or PWM operation
• Selects high, low, or toggling output on output compare
• Selects rising edge, falling edge, or any edge as the active input capture trigger
• Selects output toggling on TIMA overflow
• Selects 0 percent and 100 percent PWM duty cycle
• Selects buffered or unbuffered output compare/PWM operation
Register Name and Address: TAMODH — $0011
Bit 7654321Bit 0
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset:11111111
Register Name and Address: TAMODL — $0012
Bit 7654321Bit 0
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset:11111111
Figure 16-7. TIMA Counter Modulo Registers
(TAMODH and TAMODL)