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Block Guide — S12EETX4KV0 V00.04
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3.3.6 ESTAT — EEPROM Status Register
The ESTAT register defines the operational status of the module.
Figure 3-7 EEPROM Status Register (ESTAT)
CBEIF, PVIOL and ACCERR are readable and writable, CCIF and BLANK are readable and not writable,
remaining bits read zero and are not writable.
CBEIF — Command Buffer Empty Interrupt Flag.
The CBEIF flag indicates that the address, data and command buffers are empty so that a new
command write sequence can be started. The CBEIF flag is cleared by writing a “1” to CBEIF. Writing
a “0” to the CBEIF flag has no effect on CBEIF. Writing a “0” to CBEIF after writing an aligned word
to the EEPROM address space but before CBEIF is cleared will abort a command write sequence and
cause the ACCERR flag to be set. Writing a “0” to CBEIF outside of a command write sequence will
not set the ACCERR flag. The CBEIF flag is used together with the CBEIE bit in the ECNFG register
to generate an interrupt request (see Figure 4-8).
1 = Buffers are ready to accept a new command.
0 = Buffers are full.
CCIF — Command Complete Interrupt Flag.
Table 3-3 EEPROM Protection Address Range
EPS[2:0]
Address Offset
Range
Protected Size
000 $_FC0-$_FFF 64 bytes
001 $_F80-$_FFF 128 bytes
010 $_F40-$_FFF 192 bytes
011 $_F00-$_FFF 256 bytes
100 $_EC0-$_FFF 320 bytes
101 $_E80-$_FFF 384 bytes
110 $_E40-$_FFF 448 bytes
111 $_E00-$_FFF 512 bytes
Address Offset: $_05
765 4 3210
R
CBEIF
CCIF
PVIOL ACCERR
0 BLANK 0 0
W
Reset:
110 0 0000
= Unimplemented or Reserved
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cale Semiconductor,
I
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