user manual

Block Guide — S12EETX4KV0 V00.04
16
The EEPROM module also contains a set of 12 control and status registers located between EEPROM
register address offsets $_00 and $_0B. A summary of the EEPROM module registers is given in Table
3-2 while their accessibility is detailed in section 3.3.
NOTE: Register Address = EEPROM Control Register Base Address + Address Offset,
where the EEPROM Control Register Base Address is defined at the MCU level and
the Address Offset is defined at the EEPROM module level.
Table 3-2 EEPROM Register Map
Address
Offset
Register Name
Normal Mode
Access
$_00 EEPROM Clock Divider Register (ECLKDIV) R/W
$_01
RESERVED1
1
NOTES:
1. Intended for factory test purposes only.
R
$_02
RESERVED2
1
R
$_03 EEPROM Configuration Register (ECNFG) R/W
$_04 EEPROM Protection Register (EPROT) R/W
$_05 EEPROM Status Register (ESTAT) R/W
$_06 EEPROM Command Register (ECMD) R/W
$_07
RESERVED3
1
R
$_08
EEPROM High Address Register (EADDRHI)
1
R
$_09
EEPROM Low Address Register (EADDRLO)
1
R
$_0A
EEPROM High Data Register (EDATAHI)
1
R
$_0B
EEPROM Low Data Register (EDATALO)
1
R
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cale Semiconductor,
I
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