Data Sheet

FLC-BTM901 Datasheet
Flaircomm Microelectronics,Inc. - 24-
9 Applications Subsystem
The Applications subsystem is a processor-based subsystem that provides on-chip
Bluetooth high-level protocol stack functionality and customer programmability.
The Applications subsystem controls several peripheral interfaces:
■ Some other chip resources are programmable. For example, PIO controllers.
■ Interfaces such as USB Device, UART, I²C, SPI.
9.1Application Subsystem Features
Application subsystem features include:
■ 2 x 32 MHz central processing unit (CPU) cores using Kalimba DSP architecture
□ 32‑bit reduced instruction set computer (RISC) core with DSP features, integrated for
optimal control code execution
□ Sleep mode, interrupt controller, timers, zero overhead looping
□ Private data RAM, 32 KB on Developer processor
□ 2-way cache 16 KB on Developer processor
□ 8 KB of tightly coupled memory on Developer processor
□ Debug features such as hardware breakpoints, single step, PC trace, code
instrumentation message support
■ 32 KB shared buffer RAM
■ A direct memory access (DMA) controller core with acceleration for data encryption
and comparison, access to QSPI flash and remote subsystems
■ Demand-paged buffer management hardware providing efficient use of shared
memory by local and remote masters
■ QSPI data path unit with support for flash at 32 MHz single data rate (SDR), inline
decryption, smart multimaster arbitration
■ Multiple remote subsystem interfaces for messaging, control, and data transfer
between the various radio and audio subsystems
The Applications subsystem is powered and brought out of reset by the System Manager
and starts up automatically when clocked.
The subsystem has a single power-island. Each RAM instance is controlled
independently to optimize power.