User's Manual
Table Of Contents
- 1. Introduction
- 2. General Specification
- 3. Pin Definition
- 4. Physical Interfaces
- 5. Electrical Characteristic
- 6. Reference Design
- 7. Mechanical Characteristic
- 8. Recommended PCB Layout and Mounting Pattern
- 9. Recommended Reflow Profile
- 10. Ordering Information
FLC-BTM403 Series User Manual
Flaircomm Technologies Confidential
-16-
48MHz DDS
generation. Selection of
frequency is
programmable.
2.9 - kHz
- PCM_SYNC frequency - 8 kHz
tmclkh
(a)
PCM_CLK
high
4MHz DDS generation 980 - - ns
tmclkl
(a)
PCM_CLK low 4MHz DDS generation 730 - ns
-
PCM_CLK
jitter
48MHz DDS
generation
21 ns pk-pk
tdmclksynch
Delay time from PCM_CLK high to
PCM_SYNC high
- - 20 ns
tdmclkpout
Delay time from PCM_CLK high to valid
PCM_OUT
- - 20 ns
tdmclklsyncl
Delay time from PCM_CLK low to
PCM_SYNC low (Long Frame Sync only)
- - 20 ns
tdmclkhsyncl
Delay time from PCM_CLK high to
PCM_SYNC low
- - 20 ns
tdmclklpoutz
Delay time from PCM_CLK low to
PCM_OUT high impedance
- - 20 ns
tdmclkhpoutz
Delay time from PCM_CLK high to
PCM_OUT high impedance
- - 20 ns
tsupinclkl
Set-up time for PCM_IN valid to
PCM_CLK low
30 - - ns
thpinclkl
Hold time for PCM_CLK low to PCM_IN
invalid
10 - - ns
Table 5: PCM Master Timing