User's Manual

FLC-BTM101 Datasheet
Flaircomm Microelectronics Confidential
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protocol of this interface is proprietary. The 4 SPI debug lines directly support this function. The
SPI programs, configures and debugs the BTM101.
Take SPI_PIO#_SEL high to enable the SPI debug feature on PIO [8:5].
BTM101 uses a 16-bit data and 16-bit address programming and debug interface. Transactions occur
when the internal processor is running or is stopped.
Data is written or read one word at a time, or the auto-increment feature is available for block access.
5.4.1 I nstruction Cycle
The BTM101 is the slave and receives commands on DEBUG_MOSI and outputs data on
DEBUG_MISO. Table 7 shows the instruction cycle for a SPI transaction.
1
Reset the SPI interface
Hold DEBUG_CS# high for 2 DEBUG_CLK cycles
2
Write the command word
Take DEBUG_CS# low and clock in the 8-bit
command
3
Write the address
Clock in the 16-bit address word
4
Write or read data words
Clock in or out 16-bit data word(s)
5
Termination
Take DEBUG_CS# high
Table 7: Instruction Cycle for a SPI Transaction
With the exception of reset, DEBUG_CS# must be held low during the transaction. Data on
DEBUG_MOSI is clocked into the BTM101 on the rising edge of the clock line DEBUG_CLK.
When reading, BTM101 replies to the master on DEBUG_MISO with the data changing on the
falling edge of the DEBUG_CLK. The master provides the clock on DEBUG_CLK. The transaction
is terminated by taking DEBUG_CS# high.
The auto increment operation on the BTM101 cuts down on the overhead of sending a command
word and the address of a register for each read or write, especially when large amounts of data are
to be transferred. The auto increment offers increased data transfer efficiency on the BTM101. To
invoke auto increment, DEBUG_CS# is kept low, which auto increments the address, while
providing an extra 16 clock cycles for each extra word written or read.
5.4.2 M ulti-slave Operation