User's Manual
FLC-BTM101 Datasheet
Flaircomm Microelectronics Confidential
-17-
Figure 3: Example of an I
2
C Interface EEPROM Connection
5.3 SPI Master Interface
BTM101 provides a SPI interface to connect an external serial flash memory. The SPI master
memory interface in the BTM101 is overlaid on the I
2
C interface and uses a further 3 PIOs for the
extra pins, see Table 6.
SPI Interface
Pin
Flash_VDD
PIO[2]
SF_DIN
PIO[3]
SF_CS#
PIO[4]
SF_CLK
I2C_SCL
SF_DOUT
I2C_SDA
Table 6: SPI Master Serial Flash Memory Interface
Note:
If an application using BTM101 is designed to boot from SPI serial flash, it is possible for the
firmware to map the I
2
C interface to alternative PIOs.
The boot-up sequence for BTM101 is controlled by hardware and firmware. Figure 4 shows the
sequence of loading RAM with content from RAM, EEPROM and SPI serial flash.