Datasheet
FTL
X
1174161
I
.
I
I
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Notes
1.
M
2.
O
a
n
X
3815M3xx D
W
This do
c
contain
e
modifie
d
Printed
c
.
Pin
D
I
.
Logic
LVTTL-I
LVTTL-O
LVTTL-I
LVTTL-I
LVTTL-
I/O
LVTTL-O
LVTTL-O
LVTTL-O
CML-O
CML-O
LVTTL-I
PECL-I
PECL-I
CML-I
CML-I
:
M
odule circuit
g
O
pen collector;
n
d 3.6V.
W
DM XFP Pr
o
c
ument contains p
r
d herein, and any
d
, in whole or in p
a
c
opy may not
b
D
escriptions
Symbol
GND
VEE5
Mod-Dese
Interrupt
TX_DIS
VCC5
GND
VCC3
VCC3
SCL
SDA
Mod_Ab
s
Mod_NR
RX_LOS
GND
GND
RD-
RD+
GND
VCC2
P_Down/R
S
VCC2
GND
RefCLK
+
RefCLK-
GND
GND
TD-
TD+
GND
g
round is isola
t
should be pul
l
o
duct Specific
a
Rev.: A0
2
r
oprietary and con
other tangible rep
r
a
rt, and/or used w
i
b
e the latest re
v
Module
G
Optional
–
l Module
D
respond t
o
Interrupt
which ca
n
Transmit
t
+5 Powe
r
Module
G
+3.3V P
o
+3.3V P
o
Serial 2-
w
Serial 2-
w
s
Module
A
in the mo
Module
N
b
etween
R
Receiver
Module
G
Module
G
Receiver
Receiver
Module
G
+1.8V P
o
S
T Power D
o
p
ower st
a
initiates
a
Reset; T
h
module i
n
p
ower cy
c
+1.8V P
o
Module
G
+
Referenc
e
host boar
d
Referenc
e
board –
N
Module
G
Module
G
Transmit
t
Transmit
t
Module
G
t
ed from mod
u
ed up with 4.7
a
tion – Decem
b
2
fidential informat
i
r
esentation thereo
f
i
thout the express
e
v
ision please r
Na
m
G
roun
d
–
5.2 Power S
u
D
e-select; Wh
e
o
2-wire serial
(bar); Indicate
n
be read over
t
er Disable; Tr
a
r
Supply
G
roun
d
o
wer Suppl
y
o
wer Suppl
y
w
ire interface
c
w
ire interface
d
A
bsent; Indica
t
dule.
N
ot Ready; Fi
n
R
X_LOS and
L
Loss of Signa
l
G
roun
d
G
roun
d
inverted data
o
non-inverted
d
G
roun
d
o
wer Supply –
N
o
wn; When hi
g
a
n
d
-
b
y mode a
n
a
module rese
t
h
e falling edge
n
cluding the 2
-
c
le.
o
wer Supply –
N
G
roun
d
e
Clock non-i
n
d
– Not Requ
i
e
Clock invert
e
N
ot Required
G
roun
d
G
roun
d
t
er inverted da
t
t
er non-invert
e
G
roun
d
u
le chassis gro
u
k – 10kohms
o
b
er 2013
i
on to Finisar Cor
p
f
, is not to be copi
e
d written consen
t
r
efer to Agile
fo
me/Descripti
o
u
pply – Not us
e
n held low all
o
interface co
m
s presence of
a
the serial 2-w
i
ansmitter lase
r
c
loc
k
d
ata line
t
es module is
n
n
isar defines it
L
oss of Lock i
n
l
indicato
r
o
utpu
t
d
ata outpu
t
N
ot used
g
h, places the
m
n
d on the falli
n
initiates a co
m
-
wire serial int
e
N
ot used
n
verted input,
A
i
red
e
d input, AC c
o
t
a inpu
t
e
d data inpu
t
u
nd within the
o
n host board
t
F
p
. This document
i
ed, reproduced, d
u
t
of Finisar Corp.
fo
r current revi
s
o
n
ed
o
ws the modu
l
m
mands
a
n important c
o
i
re interface
r
source turne
d
n
ot present. Gr
o
as a logical O
R
n
TX/RX.
m
odule in the
l
n
g edge of P_
D
m
plete reset of
t
e
rface, equiva
l
A
C coupled o
n
o
upled on the
h
module.
t
o a voltage be
t
F
i n i s a
Page
2
and the entire inf
o
u
plicated, distribu
t
sion
Re
f
1
l
e to
o
ndition 2
d
off
1
2
2
o
unded 2
R
2
2
1
1
1
l
ow
D
own
t
he
l
ent to a
1
n
the
h
ost
1
1
1
t
ween 3.15V
r
2
of 24
o
rmation
t
ed, o
r
f
.